摘要
为了解决低采样速率数字化仪的现状,研制了基于四片ADC并行交替采样高速数字化仪。首先介绍了基于多片并行采样的原理,给出了基于FPGA和ARM数字化仪的整体设计方案;然后对并行交替采样的误差进行了理论分析并设计了Farrow结构的分数延时滤波器对并行时间误差进行校正;最后对数字化仪采样数据进行频谱分析实验。实验结果表明,研制的高速数字化仪能有效、快速地提高系统的采样率,且校正效果良好,在实际工程中有良好的应用前景。
In order to solve the low sampling rate situation of digitizer, a parallel and alternate high-speed digitizer based on four ADCs was developed. The parallel sampling principle based on multiple ADCs is introduced. The overall design scheme of the digitizer based on FPGA and ARM is given. The theoretical analysis for the error of parallel and alternate sampling is per- formed. A fractional delay filter with Farrow structure was designed to correct the parallel time error. The sampling data of the digitizer is conducted for spectrum analysis experiment. The experimental results show that the high-speed digitizer can improve the system sampling rate effectively and quickly, and has perfect correction effect and good application prospect in practical en- gineering.
出处
《现代电子技术》
北大核心
2016年第23期78-82,85,共6页
Modern Electronics Technique
基金
国家自然科学基金(61361006)
作者简介
甘伟旺（1988-），男，壮族，广西贵港人，硕士研究生。研究方向为高速数据采集、自动测试总线与系统。
李智（1965-），男，广西桂林人，博士，教授，博士生导师。研究方向为自动测试总线与系统、现代测试理论与技术、智能控制。
