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集成电路老化测试系统的数据通信接口设计 被引量:6

Design of Data Communication Interface and Its Application for Integrated Circuit Burn-in Test Device
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摘要 新一代大规模集成电路高温动态老化系统的设计是近年来研究的热点。以现场可编程逻辑门阵列作为核心平台,通过高速数据接口,将上位机中的数据传输到老化测试芯片中,同时把老化过程中的相关数据反馈回上位机。通过FPGA软硬件平台验证表明,该数据通信接口设计能够很好地完成集成芯片的老化过程,较传统的静态老化系统有很大的改进和提高。 How to design a new generation of high-temperature dynamic burn-in system LSI is a hot issue in recent years. In this paper, we use field-programmable gate array (FPGA) as a key design platform of the whole system, let the data in host computer transmit to the aging test chip, meanwhile the aging process relevant data feedback to the host computer, through a variety of high-speed data interface. Some experiments and tests based on FPGA show that the data interface can well complete the dynamic bum-in process, has greatly improved and enhanced comparing with the traditional static system.
出处 《杭州电子科技大学学报(自然科学版)》 2015年第6期46-49,共4页 Journal of Hangzhou Dianzi University:Natural Sciences
关键词 集成电路 动态老化 接口设计 现场可编程逻辑门阵列 integrated circuit dynamic burn-in interface design field-programmable gate array
作者简介 胡舜峰(1989-),男,浙江磐安人,在读研究生,电子与通信工程. 通信作者:张福洪教授,E-mail:fuhong@ripsina.com.
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  • 1刘斌,李仲阳.ARM/DSP双核系统的通信接口设计[J].单片机与嵌入式系统应用,2005,5(5):22-24. 被引量:21
  • 2张凯.基于ARM+DSP嵌入式的视频监控系统[D].北京:中国优秀硕士学位论文全文数据库,2007.
  • 3嵌入式系统.hnp://baike.baidu.com/view/6115.htm,2008-11-30.
  • 4Wu-Tung Cheng. Current Status and Future Trend on CAD Tools for VLSI[M]. IEEE,2000:10 - 11.
  • 5Herman Schmit, Vikas Chandra.FPGA Switch Block layout and Evaluation.Tenth ACM International Symposium on Field-programmable Gate Arrays[M]. FPGA'02 February,2000: 24-26.
  • 6Ian Harris, Russell Tessier. Diagnosis of Interconnect Faults in Cluster-based FPGA Architcetures [ M ] . IEEE, 2000:472 -475.
  • 7Sying-Jyan Wang, Chao-Neng Huang.Testing and Diagnosis of Interconnect Structures in FPGAs[ M]. IEEE, 1998: 283 -287.
  • 8High-Speed Interconnect Schemes for a Pipelined FPGA[ M]. IEEE Proc- Comput. Tech, 2000,147(3).
  • 9Dong-Hae Chi, Way Kuo. Burn-in Optimization under Reliability & Capacity Restrictions [J] . IEEE Trans. on Relubility, 1989, 38 (2): 193-198.
  • 10Sut-Mui Tang. New Burn-in Methodology Based on IC Attributes, Family IC Burn-in Data, and Failure Mechanism Analysis [A] . IEEE Proceedings Annual Reliability and Symposium[C]. 1996. 185-190.

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