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基于FPGA的PLC并行数据输出控制器设计 被引量:6

Design of FPGA-based PLC parallel data output controller
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摘要 构建了一种采用ARM与FPGA协同并行工作实现的PLC控制系统.通过设计硬连接控制电路为核心的FPGA并行输出控制器,实现FPGA与PLC之间自主高效的数据传输.解决了数据刷新,读写操作时ARM指令过多,导致PLC需要执行多条ARM指令而对执行用户程序速度产生影响的问题.该控制器根据读写数据命令的要求,按内部时序自主组织和输出数据,不需要PLC系统参与控制.相对已有接口电路,自主和并行可加快数据输出速度,减少处理器使用率,提高PLC系统的速度与工作效率. A PLC control system is constructed which is based on the collaborative parallel work of ARM and FPGA. And the FPGA parallel output controller is designed whose core is the hard connection control circuit, which realizes an independent and efficient data transmission between FPGA and PLC. The study solves the problem that ARM instruction is overmuch between the data refresh, operation of read and write, which will make PLC needs to perform multiple ARM instruction and the speed of implementation of the user program will be impacted. In accordance with the reading and writing data command request, the controller organizes and outputs data independently according to the internal sequence, does not need the PLC system to participate in controlling. In comparison with the traditional interface circuit, independence and parallel can speed up the data output speed, reduce the PLC utilization rate, improve the speed and work efficiency of PLC system.
出处 《广西工学院学报》 CAS 2013年第1期14-18,共5页 Journal of Guangxi University of Technology
基金 广西科学基金项目(桂科自2011GXNSFA018153 桂科自0991067)资助
关键词 FPGA 输出 PLC 控制器 FPGA output PLC controller
作者简介 通信作者:李克俭,教授,高级工程师,研究方向:电力电子技术与自动化装置,E-mail:lijian6262@126.com.
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