摘要
根据静态随机存储器(SRAM)电路及版图的设计特点,提出了一种新的可用于SRAM设计的快速仿真计算模型.该模型仿真快速准确,能克服Spice仿真软件对大容量SRAM版图后仿真速度较慢的缺点,在很大程度上缩短了设计周期.同时,它的仿真结果同Synopsys公司的Nanosim软件仿真结果相比偏差小于5%.该模型在龙芯Ⅱ号CPU的SRAM设计中得到了应用;芯片采用的是中芯国际0.18μmCMOS工艺.流片验证了该模型对于大容量的SRAM设计是准确而有效的.
This article presents a new fast simulation and calculation model for SRAM,which is based on the characteristics of SRAM’s circuits and layout.This model simulates the post-layout of SRAM fast and accurately,compared to slow simulation of Spice software,and decreases,the design period greatly.Meanwhile,the simulation results have fewer errors than 5% compared to the results of the Synopsys nanosim simulation.The model has been applied in the Godson Ⅱ CPU SRAM design;the chip uses the SMIC 0.18μm technology.The taped-out chip shows that the model is accurate and effective to the large capacity SRAM design.
关键词
SRAM
网表
版图后仿真
寄生效应
SRAM
netlist
simulation of post-layout
parasitism effect
