The advent of Grover’s algorithm presents a significant threat to classical block cipher security,spurring research into post-quantum secure cipher design.This study engineers quantum circuit implementations for thre...The advent of Grover’s algorithm presents a significant threat to classical block cipher security,spurring research into post-quantum secure cipher design.This study engineers quantum circuit implementations for three versions of the Ballet family block ciphers.The Ballet‑p/k includes a modular-addition operation uncommon in lightweight block ciphers.Quantum ripple-carry adder is implemented for both“32+32”and“64+64”scale to support this operation.Subsequently,qubits,quantum gates count,and quantum circuit depth of three versions of Ballet algorithm are systematically evaluated under quantum computing model,and key recovery attack circuits are constructed based on Grover’s algorithm against each version.The comprehensive analysis shows:Ballet-128/128 fails to NIST Level 1 security,while when the resource accounting is restricted to the Clifford gates and T gates set for the Ballet-128/256 and Ballet-256/256 quantum circuits,the design attains Level 3.展开更多
The growing complexity of integrated circuits (ICs) is driving the trend of IC testing towards testing based on behavioral descriptions of register-transfer level (RTL). A behavioral description contains an algorithmi...The growing complexity of integrated circuits (ICs) is driving the trend of IC testing towards testing based on behavioral descriptions of register-transfer level (RTL). A behavioral description contains an algorithmic specification of functionality of design. It may contain little or even no information about the design’s cycle-by-cycle behavior or structural implementation. However, it usually has an interior variable to lead the process of its functional phases. This interior variable is named phase variable. The functional behavior of a digital circuit changes according to different values of a phase variable. By analyzing some ITC99 benchmark circuits, this paper presents a way to generate tests for a circuit by tracing the value change of a phase variable in the circuit.展开更多
Time synchronization is a critical middleware service of wireless sensor networks. Researchers have already proposed some time synchronization algorithms. However, due to the demands for various synchronization precis...Time synchronization is a critical middleware service of wireless sensor networks. Researchers have already proposed some time synchronization algorithms. However, due to the demands for various synchronization precision, existing time synchronization algorithms often need to be adapted. So it is necessary to evaluate these adapted algorithms before use. Software simulation is a valid and quick way to do it. In this paper, we present a time synchronization simulator, Simsync, for wireless sensor networks. We decompose the packet delay into 6 delay components and model them separately. The frequency of crystal oscillator is modeled as Gaussian. To testify its effectiveness, we simulate the reference broadcast synchronization algorithm (RBS) and the timing-sync synchronization algorithm (TPSN) on Simsync. Simulated results are also presented and analyzed.展开更多
This paper focuses on fast algorithm for computing the assignment reduct in inconsistent incomplete decision systems. It is quite inconvenient to judge the assignment reduct directly ac-cording to its definition. We p...This paper focuses on fast algorithm for computing the assignment reduct in inconsistent incomplete decision systems. It is quite inconvenient to judge the assignment reduct directly ac-cording to its definition. We propose the judgment theorem for the assignment reduct in the inconsistent incomplete decision system, which greatly simplifies judging this type reduct. On such basis, we derive a novel attribute significance measure and construct the fast assignment reduction algorithm （F-ARA）, intended for com-puting the assignment reduct in inconsistent incomplete decision systems. Final y, we make a comparison between F-ARA and the discernibility matrix-based method by experiments on 13 Univer-sity of California at Irvine （UCI） datasets, and the experimental results prove that F-ARA is efficient and feasible.展开更多
Wireless sensor networks have already enabled numerous embedded wireless applications such as military, environmental monitoring, intelligent building, etc. Because micro-sensor nodes are supposed to operate for month...Wireless sensor networks have already enabled numerous embedded wireless applications such as military, environmental monitoring, intelligent building, etc. Because micro-sensor nodes are supposed to operate for months or even years with very limited battery power source, it is a challenge for researchers to obtain long operating hour without scarifying original system performances. In this paper, the energy consumption sources of the wireless sensor networks are firstly analyzed, with the digital processing and radio transceiver units being emphasized. Then, we introduce the design scheme of our energy-aware wireless sensor network (GAINS). In GAINS, techniques to conserve the energy are exploited including the energy optimization node, software and energy-efficient communication protocol. The design architecture of our ultra low power wireless sensor network (WO-LPP) is specially presented.展开更多
The paper proposes an ATPG method for the Synchronous Sequential circuits described in synthesizable VHDL behavioral RTL. The method extracts a controlling tree for each process in the behavioral description and forms...The paper proposes an ATPG method for the Synchronous Sequential circuits described in synthesizable VHDL behavioral RTL. The method extracts a controlling tree for each process in the behavioral description and forms a graph to represent the static data-flow for the target circuit. A fault-model is defined at RT-Level. The ATPG method is then presented. Experimental results show that the ATPG method is time effective and can generate tests with fairly good quality, the fault coverage of some circuits is to be enhanced though.展开更多
MicroRNAs(miRNAs)are a class of small non-coding RNAs that play important roles in post-transcriptional regulation of gene expression[1].A large number of miRNAs have been found to be involved in a broad spectrum of b...MicroRNAs(miRNAs)are a class of small non-coding RNAs that play important roles in post-transcriptional regulation of gene expression[1].A large number of miRNAs have been found to be involved in a broad spectrum of biological functions such as regulation of innate and adaptive immunity,cell differentiation and development as well as展开更多
By analyzing the effect of cross traffic (CT) enforced on packet delay, an improved path capacity measurement method, pcapminp algorithm, was proposed. With this method, path capacity was measured by filtering probe s...By analyzing the effect of cross traffic (CT) enforced on packet delay, an improved path capacity measurement method, pcapminp algorithm, was proposed. With this method, path capacity was measured by filtering probe samples based on measured minimum packet-pair delay. The measurability of minimum packet-pair delay was also analyzed by simulation. The results show that, when comparing with pathrate, if the CT load is light, both pcapminp and pathrate have similar accuracy; but in the case of heavy CT load, pcapminp is more accurate than Pathrate. When CT load reaches 90%, pcapminp algorithm has only 5% measurement error, which is 10% lower than that of pathrate algorithm. At any CT load levels, the probe cost of pcapminp algorithm is two magnitudes smaller than that of pathrate, and the measurement duration is one magnitude shorter than that of pathrate algorithm.展开更多
基金State Key Lab of Processors,Institute of Computing Technology,Chinese Academy of Sciences(CLQ202516)the Fundamental Research Funds for the Central Universities of China(3282025047,3282024051,3282024009)。
文摘The advent of Grover’s algorithm presents a significant threat to classical block cipher security,spurring research into post-quantum secure cipher design.This study engineers quantum circuit implementations for three versions of the Ballet family block ciphers.The Ballet‑p/k includes a modular-addition operation uncommon in lightweight block ciphers.Quantum ripple-carry adder is implemented for both“32+32”and“64+64”scale to support this operation.Subsequently,qubits,quantum gates count,and quantum circuit depth of three versions of Ballet algorithm are systematically evaluated under quantum computing model,and key recovery attack circuits are constructed based on Grover’s algorithm against each version.The comprehensive analysis shows:Ballet-128/128 fails to NIST Level 1 security,while when the resource accounting is restricted to the Clifford gates and T gates set for the Ballet-128/256 and Ballet-256/256 quantum circuits,the design attains Level 3.
文摘The growing complexity of integrated circuits (ICs) is driving the trend of IC testing towards testing based on behavioral descriptions of register-transfer level (RTL). A behavioral description contains an algorithmic specification of functionality of design. It may contain little or even no information about the design’s cycle-by-cycle behavior or structural implementation. However, it usually has an interior variable to lead the process of its functional phases. This interior variable is named phase variable. The functional behavior of a digital circuit changes according to different values of a phase variable. By analyzing some ITC99 benchmark circuits, this paper presents a way to generate tests for a circuit by tracing the value change of a phase variable in the circuit.
基金Supported in part by National Basic Research Program of P. R. China(2005CB321604) in part by National Natural Science Foundation of P. R. China (90207002)
文摘Time synchronization is a critical middleware service of wireless sensor networks. Researchers have already proposed some time synchronization algorithms. However, due to the demands for various synchronization precision, existing time synchronization algorithms often need to be adapted. So it is necessary to evaluate these adapted algorithms before use. Software simulation is a valid and quick way to do it. In this paper, we present a time synchronization simulator, Simsync, for wireless sensor networks. We decompose the packet delay into 6 delay components and model them separately. The frequency of crystal oscillator is modeled as Gaussian. To testify its effectiveness, we simulate the reference broadcast synchronization algorithm (RBS) and the timing-sync synchronization algorithm (TPSN) on Simsync. Simulated results are also presented and analyzed.
基金supported by the National Natural Science Foundation of China(61363047)the Jiangxi Education Department(GJJ13760)the Science and Technology Support Foundation of Jiangxi Province(20111BBE50008)
文摘This paper focuses on fast algorithm for computing the assignment reduct in inconsistent incomplete decision systems. It is quite inconvenient to judge the assignment reduct directly ac-cording to its definition. We propose the judgment theorem for the assignment reduct in the inconsistent incomplete decision system, which greatly simplifies judging this type reduct. On such basis, we derive a novel attribute significance measure and construct the fast assignment reduction algorithm （F-ARA）, intended for com-puting the assignment reduct in inconsistent incomplete decision systems. Final y, we make a comparison between F-ARA and the discernibility matrix-based method by experiments on 13 Univer-sity of California at Irvine （UCI） datasets, and the experimental results prove that F-ARA is efficient and feasible.
基金Supported in part by National Basic Research Program of P. R. China (2005CB321604) in part by National Natural Science Foundation of P. R. China (90207002)
文摘Wireless sensor networks have already enabled numerous embedded wireless applications such as military, environmental monitoring, intelligent building, etc. Because micro-sensor nodes are supposed to operate for months or even years with very limited battery power source, it is a challenge for researchers to obtain long operating hour without scarifying original system performances. In this paper, the energy consumption sources of the wireless sensor networks are firstly analyzed, with the digital processing and radio transceiver units being emphasized. Then, we introduce the design scheme of our energy-aware wireless sensor network (GAINS). In GAINS, techniques to conserve the energy are exploited including the energy optimization node, software and energy-efficient communication protocol. The design architecture of our ultra low power wireless sensor network (WO-LPP) is specially presented.
基金Supported by National Natural Science Foundation of China(60675039)National High Technology Research and Development Program of China(863 Program)(2006AA04Z217)Hundred Talents Program of Chinese Academy of Sciences
基金supported by National Natural Science Foundation of China under grant No.69733010.
文摘The paper proposes an ATPG method for the Synchronous Sequential circuits described in synthesizable VHDL behavioral RTL. The method extracts a controlling tree for each process in the behavioral description and forms a graph to represent the static data-flow for the target circuit. A fault-model is defined at RT-Level. The ATPG method is then presented. Experimental results show that the ATPG method is time effective and can generate tests with fairly good quality, the fault coverage of some circuits is to be enhanced though.
文摘MicroRNAs(miRNAs)are a class of small non-coding RNAs that play important roles in post-transcriptional regulation of gene expression[1].A large number of miRNAs have been found to be involved in a broad spectrum of biological functions such as regulation of innate and adaptive immunity,cell differentiation and development as well as
基金Projects(60473031, 60673155) supported by the National Natural Science Foundation of ChinaProject(2005AA121560) supported by the High-Tech Research and Development Program of China
文摘By analyzing the effect of cross traffic (CT) enforced on packet delay, an improved path capacity measurement method, pcapminp algorithm, was proposed. With this method, path capacity was measured by filtering probe samples based on measured minimum packet-pair delay. The measurability of minimum packet-pair delay was also analyzed by simulation. The results show that, when comparing with pathrate, if the CT load is light, both pcapminp and pathrate have similar accuracy; but in the case of heavy CT load, pcapminp is more accurate than Pathrate. When CT load reaches 90%, pcapminp algorithm has only 5% measurement error, which is 10% lower than that of pathrate algorithm. At any CT load levels, the probe cost of pcapminp algorithm is two magnitudes smaller than that of pathrate, and the measurement duration is one magnitude shorter than that of pathrate algorithm.
