This paper proposes a parallel cyclic shift structure of address decoder to realize a high-throughput encoding and decoding method for irregular-quasi-cyclic low-density parity-check(IR-QC-LDPC)codes,with a dual-diago...This paper proposes a parallel cyclic shift structure of address decoder to realize a high-throughput encoding and decoding method for irregular-quasi-cyclic low-density parity-check(IR-QC-LDPC)codes,with a dual-diagonal parity structure.A normalized min-sum algorithm(NMSA)is employed for decoding.The whole verification of the encoding and decoding algorithm is simulated with Matlab,and the code rates of 5/6 and 2/3 are selected respectively for the initial bit error ratio as 6%and 1.04%.Based on the results of simulation,multi-code rates are compatible with different basis matrices.Then the simulated algorithms of encoder and decoder are migrated and implemented on the field programmable gate array(FPGA).The 183.36 Mbps throughput of encoder and the average 27.85 Mbps decoding throughput with the initial bit error ratio 6%are realized based on FPGA.展开更多
Due to the limited scenes that synthetic aperture radar(SAR)satellites can detect,the full-track utilization rate is not high.Because of the computing and storage limitation of one satellite,it is difficult to process...Due to the limited scenes that synthetic aperture radar(SAR)satellites can detect,the full-track utilization rate is not high.Because of the computing and storage limitation of one satellite,it is difficult to process large amounts of data of spaceborne synthetic aperture radars.It is proposed to use a new method of networked satellite data processing for improving the efficiency of data processing.A multi-satellite distributed SAR real-time processing method based on Chirp Scaling(CS)imaging algorithm is studied in this paper,and a distributed data processing system is built with field programmable gate array(FPGA)chips as the kernel.Different from the traditional CS algorithm processing,the system divides data processing into three stages.The computing tasks are reasonably allocated to different data processing units(i.e.,satellites)in each stage.The method effectively saves computing and storage resources of satellites,improves the utilization rate of a single satellite,and shortens the data processing time.Gaofen-3(GF-3)satellite SAR raw data is processed by the system,with the performance of the method verified.展开更多
SRAM(Static Random Access Memory)型FPGA凭借其动态结构调整的灵活性等特点,被广泛应用于工业领域。针对动态可重构功能单元的布局问题,分析了模拟退火解决方案的局限性,提出了基于电路分层划分和时延驱动的在线布局算法。算法首先按...SRAM(Static Random Access Memory)型FPGA凭借其动态结构调整的灵活性等特点,被广泛应用于工业领域。针对动态可重构功能单元的布局问题,分析了模拟退火解决方案的局限性,提出了基于电路分层划分和时延驱动的在线布局算法。算法首先按最小分割原则将电路划分为一定数目的层,然后按自顶向下的原则在芯片的每一层中布局划分出的层,同时保证电路关键路径的延时最小。实验结果表明,所述算法在时延、线长和运行时间方面均优于VPR算法。展开更多
Afuzzy controller based oni mproved Generalized-Membership-Function(GMF) algorithmfor afuel cell generationsys-tem wasintroduced.Under the demands on control in application of the converter,a Field Programmable Gate A...Afuzzy controller based oni mproved Generalized-Membership-Function(GMF) algorithmfor afuel cell generationsys-tem wasintroduced.Under the demands on control in application of the converter,a Field Programmable Gate Array(FPGA) re-alization method to manage the power flow was given.This control systembased onthe proposed modified GMF was proved to bea universal approxi mation systemin theory.The fuzzy control technique was combined with Eletronic Design Automatic(EDA)technique and a paralleling fuzzy controller was i mplemented in FPGA.Paralleling fuzzy controller based oni mproved GMF algo-rithm wasi mplemented on a Cyclone FPGA.The result of si mulation based on QuartusII confirmed the validity of the proposed method.展开更多
As semiconductor technologies have been shrinking,the speed of circuits,integration density,and the number of I/O interfaces have been significantly increasing.As a consequence,electromagnetic emanation(EME)becomes a ...As semiconductor technologies have been shrinking,the speed of circuits,integration density,and the number of I/O interfaces have been significantly increasing.As a consequence,electromagnetic emanation(EME)becomes a critical issue in digital system designs.Electronic devices must meet electromagnetic compatibility(EMC)requirements to ensure that they operate properly,and safely without interference.I/O buffers consume high currents when they operate.The bonding wires,and lead frames are long enough to play as efficient antennas to radiate electromagnetic interference(EMI).Therefore,I/O switching activities significantly contribute to the EMI.In this paper,we evaluate and analyze the impact of I/O switching activities on the EME.We will change the circuit configurations such as the supply voltage for I/O banks,their switching frequency,driving current,and slew rate.Additionally,a trade-off between the switching frequencies and the number of simultaneous switching outputs(SSOs)is also considered in terms of EME.Moreover,we evaluate the electromagnetic emissions that are associated with the different I/O switching patterns.The results show that the electromagnetic emissions associated I/O switching activities depend strongly on their operating parameters and configurations.All the circuit implementations and measurements are carried out on a Xilinx Spartan-3 FPGA.展开更多
基金supported by the National Natural Science Foundation of China(11705191)the Anhui Provincial Natural Science Foundation(1808085QF180)the Natural Science Foundation of Shanghai(18ZR1443600)
文摘This paper proposes a parallel cyclic shift structure of address decoder to realize a high-throughput encoding and decoding method for irregular-quasi-cyclic low-density parity-check(IR-QC-LDPC)codes,with a dual-diagonal parity structure.A normalized min-sum algorithm(NMSA)is employed for decoding.The whole verification of the encoding and decoding algorithm is simulated with Matlab,and the code rates of 5/6 and 2/3 are selected respectively for the initial bit error ratio as 6%and 1.04%.Based on the results of simulation,multi-code rates are compatible with different basis matrices.Then the simulated algorithms of encoder and decoder are migrated and implemented on the field programmable gate array(FPGA).The 183.36 Mbps throughput of encoder and the average 27.85 Mbps decoding throughput with the initial bit error ratio 6%are realized based on FPGA.
基金Project(2017YFC1405600)supported by the National Key R&D Program of ChinaProject(18JK05032)supported by the Scientific Research Project of Education Department of Shaanxi Province,China。
文摘Due to the limited scenes that synthetic aperture radar(SAR)satellites can detect,the full-track utilization rate is not high.Because of the computing and storage limitation of one satellite,it is difficult to process large amounts of data of spaceborne synthetic aperture radars.It is proposed to use a new method of networked satellite data processing for improving the efficiency of data processing.A multi-satellite distributed SAR real-time processing method based on Chirp Scaling(CS)imaging algorithm is studied in this paper,and a distributed data processing system is built with field programmable gate array(FPGA)chips as the kernel.Different from the traditional CS algorithm processing,the system divides data processing into three stages.The computing tasks are reasonably allocated to different data processing units(i.e.,satellites)in each stage.The method effectively saves computing and storage resources of satellites,improves the utilization rate of a single satellite,and shortens the data processing time.Gaofen-3(GF-3)satellite SAR raw data is processed by the system,with the performance of the method verified.
文摘SRAM(Static Random Access Memory)型FPGA凭借其动态结构调整的灵活性等特点,被广泛应用于工业领域。针对动态可重构功能单元的布局问题,分析了模拟退火解决方案的局限性,提出了基于电路分层划分和时延驱动的在线布局算法。算法首先按最小分割原则将电路划分为一定数目的层,然后按自顶向下的原则在芯片的每一层中布局划分出的层,同时保证电路关键路径的延时最小。实验结果表明,所述算法在时延、线长和运行时间方面均优于VPR算法。
文摘Afuzzy controller based oni mproved Generalized-Membership-Function(GMF) algorithmfor afuel cell generationsys-tem wasintroduced.Under the demands on control in application of the converter,a Field Programmable Gate Array(FPGA) re-alization method to manage the power flow was given.This control systembased onthe proposed modified GMF was proved to bea universal approxi mation systemin theory.The fuzzy control technique was combined with Eletronic Design Automatic(EDA)technique and a paralleling fuzzy controller was i mplemented in FPGA.Paralleling fuzzy controller based oni mproved GMF algo-rithm wasi mplemented on a Cyclone FPGA.The result of si mulation based on QuartusII confirmed the validity of the proposed method.
基金Project(2018R1D1A1B07043399)supported by Basic Science Research Program through the National Research Foundation,Korea
文摘As semiconductor technologies have been shrinking,the speed of circuits,integration density,and the number of I/O interfaces have been significantly increasing.As a consequence,electromagnetic emanation(EME)becomes a critical issue in digital system designs.Electronic devices must meet electromagnetic compatibility(EMC)requirements to ensure that they operate properly,and safely without interference.I/O buffers consume high currents when they operate.The bonding wires,and lead frames are long enough to play as efficient antennas to radiate electromagnetic interference(EMI).Therefore,I/O switching activities significantly contribute to the EMI.In this paper,we evaluate and analyze the impact of I/O switching activities on the EME.We will change the circuit configurations such as the supply voltage for I/O banks,their switching frequency,driving current,and slew rate.Additionally,a trade-off between the switching frequencies and the number of simultaneous switching outputs(SSOs)is also considered in terms of EME.Moreover,we evaluate the electromagnetic emissions that are associated with the different I/O switching patterns.The results show that the electromagnetic emissions associated I/O switching activities depend strongly on their operating parameters and configurations.All the circuit implementations and measurements are carried out on a Xilinx Spartan-3 FPGA.
