The Ocean 4A scatterometer, expected to be launched in 2024, is poised to be the world’s first spaceborne microwave scatterometer utilizing a digital beamforming system. To ensure high-precision measurements and perf...The Ocean 4A scatterometer, expected to be launched in 2024, is poised to be the world’s first spaceborne microwave scatterometer utilizing a digital beamforming system. To ensure high-precision measurements and performance sta-bility across diverse environments, stringent requirements are placed on the dynamic range of its receiving system. This paper provides a detailed exposition of a field-programmable gate array (FPGA)-based automatic gain control (AGC) design for the spaceborne scatterometer. Implemented on an FPGA, the algo-rithm harnesses its parallel processing capabilities and high-speed performance to monitor the received echo signals in real time. Employing an adaptive AGC algorithm, the system gene-rates gain control codes applicable to the intermediate fre-quency variable attenuator, enabling rapid and stable adjust-ment of signal amplitudes from the intermediate frequency amplifier to an optimal range. By adopting a purely digital pro-cessing approach, experimental results demonstrate that the AGC algorithm exhibits several advantages, including fast con-vergence, strong flexibility, high precision, and outstanding sta-bility. This innovative design lays a solid foundation for the high-precision measurements of the Ocean 4A scatterometer, with potential implications for the future of spaceborne microwave scatterometers.展开更多
This paper proposes a parallel cyclic shift structure of address decoder to realize a high-throughput encoding and decoding method for irregular-quasi-cyclic low-density parity-check(IR-QC-LDPC)codes,with a dual-diago...This paper proposes a parallel cyclic shift structure of address decoder to realize a high-throughput encoding and decoding method for irregular-quasi-cyclic low-density parity-check(IR-QC-LDPC)codes,with a dual-diagonal parity structure.A normalized min-sum algorithm(NMSA)is employed for decoding.The whole verification of the encoding and decoding algorithm is simulated with Matlab,and the code rates of 5/6 and 2/3 are selected respectively for the initial bit error ratio as 6%and 1.04%.Based on the results of simulation,multi-code rates are compatible with different basis matrices.Then the simulated algorithms of encoder and decoder are migrated and implemented on the field programmable gate array(FPGA).The 183.36 Mbps throughput of encoder and the average 27.85 Mbps decoding throughput with the initial bit error ratio 6%are realized based on FPGA.展开更多
SRAM(Static Random Access Memory)型FPGA凭借其动态结构调整的灵活性等特点,被广泛应用于工业领域。针对动态可重构功能单元的布局问题,分析了模拟退火解决方案的局限性,提出了基于电路分层划分和时延驱动的在线布局算法。算法首先按...SRAM(Static Random Access Memory)型FPGA凭借其动态结构调整的灵活性等特点,被广泛应用于工业领域。针对动态可重构功能单元的布局问题,分析了模拟退火解决方案的局限性,提出了基于电路分层划分和时延驱动的在线布局算法。算法首先按最小分割原则将电路划分为一定数目的层,然后按自顶向下的原则在芯片的每一层中布局划分出的层,同时保证电路关键路径的延时最小。实验结果表明,所述算法在时延、线长和运行时间方面均优于VPR算法。展开更多
Afuzzy controller based oni mproved Generalized-Membership-Function(GMF) algorithmfor afuel cell generationsys-tem wasintroduced.Under the demands on control in application of the converter,a Field Programmable Gate A...Afuzzy controller based oni mproved Generalized-Membership-Function(GMF) algorithmfor afuel cell generationsys-tem wasintroduced.Under the demands on control in application of the converter,a Field Programmable Gate Array(FPGA) re-alization method to manage the power flow was given.This control systembased onthe proposed modified GMF was proved to bea universal approxi mation systemin theory.The fuzzy control technique was combined with Eletronic Design Automatic(EDA)technique and a paralleling fuzzy controller was i mplemented in FPGA.Paralleling fuzzy controller based oni mproved GMF algo-rithm wasi mplemented on a Cyclone FPGA.The result of si mulation based on QuartusII confirmed the validity of the proposed method.展开更多
Multiuser detection can be described as a quadratic optimization problem with binary constraint. Many techniques are available to find approximate solution to this problem. These tech- niques can be characterized in t...Multiuser detection can be described as a quadratic optimization problem with binary constraint. Many techniques are available to find approximate solution to this problem. These tech- niques can be characterized in terms of complexity and detection performance. The ＂efficient frontier＂ of known techniques include the decision-feedback, branch-and-bound and probabilistic data association detectors. The presented iterative multiuser detection technique is based on joint deregularized and box-constrained so- lution to quadratic optimization with iterations similar to that used in the nonstationary Tikhonov iterated algorithm. The deregulari- zation maximizes the energy of the solution, this is opposite to the Tikhonov regularization where the energy is minimized. However, combined with box-constraints, the deregularization forces the solution to be close to the binary set. We further exploit the box- constrained dichotomous coordinate descent （DCD） algorithm and adapt it to the nonstationary iterative Tikhonov regularization to present an efficient detector. As a result, the worst-case and aver- age complexity are reduced down to K28 and K2~ floating point operation per second, respectively. The development improves the ＂efficient frontier＂ in multiuser detection, which is illustrated by simulation results. Finally, a field programmable gate array （FPGA） design of the detector is presented. The detection performance obtained from the fixed-point FPGA implementation shows a good match to the floating-point implementation.展开更多
文摘The Ocean 4A scatterometer, expected to be launched in 2024, is poised to be the world’s first spaceborne microwave scatterometer utilizing a digital beamforming system. To ensure high-precision measurements and performance sta-bility across diverse environments, stringent requirements are placed on the dynamic range of its receiving system. This paper provides a detailed exposition of a field-programmable gate array (FPGA)-based automatic gain control (AGC) design for the spaceborne scatterometer. Implemented on an FPGA, the algo-rithm harnesses its parallel processing capabilities and high-speed performance to monitor the received echo signals in real time. Employing an adaptive AGC algorithm, the system gene-rates gain control codes applicable to the intermediate fre-quency variable attenuator, enabling rapid and stable adjust-ment of signal amplitudes from the intermediate frequency amplifier to an optimal range. By adopting a purely digital pro-cessing approach, experimental results demonstrate that the AGC algorithm exhibits several advantages, including fast con-vergence, strong flexibility, high precision, and outstanding sta-bility. This innovative design lays a solid foundation for the high-precision measurements of the Ocean 4A scatterometer, with potential implications for the future of spaceborne microwave scatterometers.
基金supported by the National Natural Science Foundation of China(11705191)the Anhui Provincial Natural Science Foundation(1808085QF180)the Natural Science Foundation of Shanghai(18ZR1443600)
文摘This paper proposes a parallel cyclic shift structure of address decoder to realize a high-throughput encoding and decoding method for irregular-quasi-cyclic low-density parity-check(IR-QC-LDPC)codes,with a dual-diagonal parity structure.A normalized min-sum algorithm(NMSA)is employed for decoding.The whole verification of the encoding and decoding algorithm is simulated with Matlab,and the code rates of 5/6 and 2/3 are selected respectively for the initial bit error ratio as 6%and 1.04%.Based on the results of simulation,multi-code rates are compatible with different basis matrices.Then the simulated algorithms of encoder and decoder are migrated and implemented on the field programmable gate array(FPGA).The 183.36 Mbps throughput of encoder and the average 27.85 Mbps decoding throughput with the initial bit error ratio 6%are realized based on FPGA.
文摘SRAM(Static Random Access Memory)型FPGA凭借其动态结构调整的灵活性等特点,被广泛应用于工业领域。针对动态可重构功能单元的布局问题,分析了模拟退火解决方案的局限性,提出了基于电路分层划分和时延驱动的在线布局算法。算法首先按最小分割原则将电路划分为一定数目的层,然后按自顶向下的原则在芯片的每一层中布局划分出的层,同时保证电路关键路径的延时最小。实验结果表明,所述算法在时延、线长和运行时间方面均优于VPR算法。
文摘Afuzzy controller based oni mproved Generalized-Membership-Function(GMF) algorithmfor afuel cell generationsys-tem wasintroduced.Under the demands on control in application of the converter,a Field Programmable Gate Array(FPGA) re-alization method to manage the power flow was given.This control systembased onthe proposed modified GMF was proved to bea universal approxi mation systemin theory.The fuzzy control technique was combined with Eletronic Design Automatic(EDA)technique and a paralleling fuzzy controller was i mplemented in FPGA.Paralleling fuzzy controller based oni mproved GMF algo-rithm wasi mplemented on a Cyclone FPGA.The result of si mulation based on QuartusII confirmed the validity of the proposed method.
基金supported by the National Council for Technological and Scientific Development of Brazil (RN82/2008)
文摘Multiuser detection can be described as a quadratic optimization problem with binary constraint. Many techniques are available to find approximate solution to this problem. These tech- niques can be characterized in terms of complexity and detection performance. The ＂efficient frontier＂ of known techniques include the decision-feedback, branch-and-bound and probabilistic data association detectors. The presented iterative multiuser detection technique is based on joint deregularized and box-constrained so- lution to quadratic optimization with iterations similar to that used in the nonstationary Tikhonov iterated algorithm. The deregulari- zation maximizes the energy of the solution, this is opposite to the Tikhonov regularization where the energy is minimized. However, combined with box-constraints, the deregularization forces the solution to be close to the binary set. We further exploit the box- constrained dichotomous coordinate descent （DCD） algorithm and adapt it to the nonstationary iterative Tikhonov regularization to present an efficient detector. As a result, the worst-case and aver- age complexity are reduced down to K28 and K2~ floating point operation per second, respectively. The development improves the ＂efficient frontier＂ in multiuser detection, which is illustrated by simulation results. Finally, a field programmable gate array （FPGA） design of the detector is presented. The detection performance obtained from the fixed-point FPGA implementation shows a good match to the floating-point implementation.
