SiC MOSFET是一种高性能的电力电子器件,其开通/关断过程中积累/释放的栅电荷Q_(g)对MOSFET的开关速度、功率损耗等参数有重要影响。通常采用在栅极设置恒流源驱动,对时间进行积分的方法来测量Q_(g)。为了降低驱动复杂度,提高测试结果...SiC MOSFET是一种高性能的电力电子器件,其开通/关断过程中积累/释放的栅电荷Q_(g)对MOSFET的开关速度、功率损耗等参数有重要影响。通常采用在栅极设置恒流源驱动,对时间进行积分的方法来测量Q_(g)。为了降低驱动复杂度,提高测试结果精度和可视性,基于双脉冲测试平台的感性负载回路,改用耗尽型MOSFET限制栅极电流实现恒流充电,对SiC MOSFET进行测试。同时利用反馈电阻将较小的栅极电流信号转换为较大的电压信号。实验结果表明:在误差允许范围(±5%)内该测试方案能较为准确地测得SiC MOSFET的Q_(g),测试结果符合器件规格书曲线。展开更多
SiC MOSFET广泛应用于高频领域,这使其在半桥电路中极易发生串扰现象。实际情况中,半桥电路上、下桥臂的栅极电阻通常保持一致。然而,现有的串扰研究仅在某一桥臂的栅极电阻为定值的条件下分析另一桥臂中栅极电阻的影响,难以获取实际电...SiC MOSFET广泛应用于高频领域,这使其在半桥电路中极易发生串扰现象。实际情况中,半桥电路上、下桥臂的栅极电阻通常保持一致。然而,现有的串扰研究仅在某一桥臂的栅极电阻为定值的条件下分析另一桥臂中栅极电阻的影响,难以获取实际电路中的串扰特性。研究了SiC MOSFET半桥电路串扰特性,分析了上、下桥臂栅极电阻单独变化与同步变化对串扰的影响规律,并探究了不同共源极电感情况下栅极电阻对串扰电压的影响,最后搭建了动态特性测试平台,实验验证了理论分析的正确性。结果表明,与只改变关断器件的栅极电阻相比,上、下桥臂同步变化时串扰电压的正峰值更小,栅极电阻的取值范围也更宽,为半桥电路中SiC MOSFET的低干扰驱动设计提供了理论参考。展开更多
SiC MOSFET开关速度快导致其对测试平台的寄生参数较为敏感,而高电压和大电流的特性也为测试平台设计带来挑战。自主设计和搭建了一套集成化和规范化的大功率双脉冲测试平台,利用叠层母排结构的低杂感集成化设计,减小器件过快的开关速...SiC MOSFET开关速度快导致其对测试平台的寄生参数较为敏感,而高电压和大电流的特性也为测试平台设计带来挑战。自主设计和搭建了一套集成化和规范化的大功率双脉冲测试平台,利用叠层母排结构的低杂感集成化设计,减小器件过快的开关速度对主回路寄生电感的影响;通过驱动过欠压保护电路设计,减小大电流密度的影响,保证器件可靠开通和关断。为验证该测试平台的实用性,选取几种国内外不同厂家的SiC MOSFET进行主要动态参数在不同结温下的测试及分析,全面评估了器件动态特性与温度的关系,研究结果对器件的生产和应用具有一定意义。展开更多
The magnetoresistive random access memory process makes a great contribution to threshold voltage deterioration of metal-oxide-silicon field-effect transistors,especially on p-type devices.Herein,a method was proposed...The magnetoresistive random access memory process makes a great contribution to threshold voltage deterioration of metal-oxide-silicon field-effect transistors,especially on p-type devices.Herein,a method was proposed to reduce the threshold voltage degradation by utilizing back-side stress.Through the deposition of tensile material on the back side,positive charges generated by silicon-hydrogen bond breakage were inhibited,resulting in a potential reduction in threshold voltage shift by up to 20%.In addition,it was found that the method could only relieve silicon-hydrogen bond breakage physically,thus failing to provide a complete cure.However,it holds significant potential for applications where additional thermal budget is undesired.Furthermore,it was also concluded that the method used in this work is irreversible,with its effect sustained to the chip package phase,and it ensures competitive reliability of the resulting magnetic tunnel junction devices.展开更多
基金Project supported by the National Natural Science Foundation of China(Grant No.51672246)the National Key Research and Development Program of China(Grant Nos.2017YFA0304302 and 2020AAA0109003)the Key Research and Development Program of Zhejiang Province,China(Grant No.2021C01002)。
文摘The magnetoresistive random access memory process makes a great contribution to threshold voltage deterioration of metal-oxide-silicon field-effect transistors,especially on p-type devices.Herein,a method was proposed to reduce the threshold voltage degradation by utilizing back-side stress.Through the deposition of tensile material on the back side,positive charges generated by silicon-hydrogen bond breakage were inhibited,resulting in a potential reduction in threshold voltage shift by up to 20%.In addition,it was found that the method could only relieve silicon-hydrogen bond breakage physically,thus failing to provide a complete cure.However,it holds significant potential for applications where additional thermal budget is undesired.Furthermore,it was also concluded that the method used in this work is irreversible,with its effect sustained to the chip package phase,and it ensures competitive reliability of the resulting magnetic tunnel junction devices.
