摘要
首先讨论了可重构计算的基本含义及特点 ,指出它的实质是突破了通用微处理仅时间维可变 ,ASIC空间维可变的限制 ,实现时间、空间两维可编程 其次 ,系统地综述了基于FPGA的可重构计算硬件结构的基本技术 ,重点讨论了逻辑单元的粒度及单元间互连的路由问题
The basic meanings and features of reconfigurable computing are first discussed It is pointed out that reconfigurable computing has actually broken out the limitation of the general purpose CPU, which only varies in time dimension, and the limitation of ASIC, which only varies in space dimension Reconfigurable computing can be programmed in both time and space dimension Then described systematically are the basic technologies of hardware structure of reconfigurable computing based on FPGA Emphasis is put on the problems of particle size of logical units and routes between logical units Some typical products are introduced Finally, some typical architectures of reconfigurable computing are given
出处
《计算机研究与发展》
EI
CSCD
北大核心
2003年第3期500-506,共7页
Journal of Computer Research and Development
基金
国家自然科学基金项目 ( 699740 3 1)
