摘要
As a core component in intelligent edge computing,deep neural networks(DNNs)will increasingly play a critically important role in addressing the intelligence-related issues in the industry domain,like smart factories and autonomous driving.Due to the requirement for a large amount of storage space and computing resources,DNNs are unfavorable for resource-constrained edge computing devices,especially for mobile terminals with scarce energy supply.Binarization of DNN has become a promising technology to achieve a high performance with low resource consumption in edge computing.Field-programmable gate array(FPGA)-based acceleration can further improve the computation efficiency to several times higher compared with the central processing unit(CPU)and graphics processing unit(GPU).This paper gives a brief overview of binary neural networks(BNNs)and the corresponding hardware accelerator designs on edge computing environments,and analyzes some significant studies in detail.The performances of some methods are evaluated through the experiment results,and the latest binarization technologies and hardware acceleration methods are tracked.We first give the background of designing BNNs and present the typical types of BNNs.The FPGA implementation technologies of BNNs are then reviewed.Detailed comparison with experimental evaluation on typical BNNs and their FPGA implementation is further conducted.Finally,certain interesting directions are also illustrated as future work.
基金
supported by the Natural Science Foundation of Sichuan Province of China under Grant No.2022NSFSC0500
the National Natural Science Foundation of China under Grant No.62072076.
作者简介
Jin-Yu Zhan was born in Heilongjiang,China in 1978.She received the B.S.,M.S.,and Ph.D.degrees from University of Electronic Science and Technology of China(UESTC),Chengdu,China in 2000,2003,and 2006,respectively.She is currently an associate professor with the School of Information and Software Engineering,UESTC.Her current research interests include embedded AI,dependable AI,FPGA accelerators,and embedded system designs.E-mail addresses:zhanjy@uestc.edu.cn;An-Tai Yu was born in Henan,China in 1996.He received the B.S.degree from China Jiliang University,Hangzhou,China in 2020.He is currently pursuing the M.S.degree with the School of Information and Software Engineering,UESTC.His research interests include dependable AI and embedded system designs,E-mail addresses:202021090211@std.uestc.edu.cn;Corresponding author:Wei Jiang was born in Sichuan,China in 1981.He received the B.S.,M.S.,and Ph.D.degrees from UESTC in 2003,2006,and 2009,respectively.He is currently an associate professor with the School of Information and Software Engineering,UESTC.His current research interests include dependable AI,embedded AI,hardware/software co-designs,and embedded system designs.E-mail addresses:weijiang@uestc.edu.cn;Yong-Jia Yang was born in Sichuan,China in 1996.He received the B.S.degree from UESTC in 2018.He is currently pursuing the M.S.degree with the School of Information and Software Engineering,UESTC.His research interests include dependable AI and embedded system designs.E-mail addresses:yangyongjia@std.uestc.edu.cn;Xiao-Na Xie was born in Henan,China in 1978.She received the Ph.D.degree from UESTC in 2014.She is currently an associate professor with the School of Automation,Chengdu University of Information Technology,Chengdu,China.Her current research interests include embedded AI,dependable AI,and intelligent computing.E-mail addresses:xxn1213@cuit.edu.cn;Zheng-Wei Chang was born in Henan,China in 1981.He received the Ph.D.degree from UESTC in 2009.He is currently a professor with the State Grid Sichuan Electric Power Research Institute,Chengdu,China.His current research interests include embedded AI,dependable AI,embedded system designs,and smart grids.E-mail addresses:changzw@ustc.edu.cn;Jun-Huan Yang was born in Sichuan,China in 1993.He received his B.S.and M.S.degrees in software engineering from UESTC in 2015 and 2018,respectively.He is currently a Ph.D.candidate with the Department of Information Sciences and Technology,George Mason University,Fairfax,USA.His current research interests include embedded AI and embedded system designs,E-mail addresses:jyang71@gmu.edu。