摘要
近年来,随着摩尔定律的放缓,传统体系结构逐渐面临“存储墙”和“功耗墙”问题。如今新型计算模式和体系结构层出不穷,其中就包含了类脑计算。由于其存算一体的特点,类脑计算已逐步打破了冯·诺依曼体系结构带来的“存储墙”和“功耗墙”限制,在类脑处理器上相关类脑算法得到了高效的应用。现阶段在大规模生物神经网络的应用场景下,需要提升多核类脑处理器的规模可扩展性,保持其高数据吞吐量和低传输延时。现今,大多数多核类脑处理器的设计采用片上网络作为互连结构。然而目前关于这类片上网络的验证研究还相对较少。鉴于片上网络对多核类脑处理器的重要性,建立一套完整而鲁棒的片上网络功能验证框架意义重大。旨在基于随机化方法来生成行为级和FPGA硬件级测试所需的激励文件,通过对日志文件进行高效处理实现较为全面的功能验证。
In recent years,traditional computer architectures have gradually been faced with severe bottlenecks of “Memory Wall” and “Power Wall”,with the step-down Moore’s law.However,many other new forms of computing paradigms and computer architectures have been proposed,including neuromorphic computing.Given the characteristic of computing in memory,neuromorphic computing plays a vital role in breaking down the limitation caused by both “Memory Wall” and “Power Wall” constraints in Von Neumann architecture.Many neuromorphic applications on neuromorphic processors have already been demonstrated as high efficiency and accuracy.Currently,in the application scenarios of large-scale biological neural networks,it is necessary to improve the scalability of multi-core neuromorphic processors and maintain their high data throughput and low transmission delay.Today,most multi-core neuromorphic processors adopt a network-on-chip(NoC) as the interconnect structure.However,there are still relatively few verification studies on such NoC.Given the importance of NoC in designing a neuromorphic processors,it is quite necessary to set up a complete and robust NoC functional verification platform for neuromorphic processors.The purpose of this paper is to generate the stimulus files required for behavioral and FPGA hardware-level testing based on the randomization method,and to achieve a more comprehensive functional verification through efficient processing of log files.
作者
陈小帆
杨智杰
彭凌辉
王世英
周干
李石明
康子扬
王耀
石伟
王蕾
CHEN Xiao-fan;YANG Zhi-jie;PENG Ling-hui;WANG Shi-ying;ZHOU Gan;LI Shi-ming;KANG Zi-yang;WANG Yao;SHI Wei;WANG Lei(College of Computer Science and Technology,National University of Defense Technology,Changsha 410073,China)
出处
《计算机工程与科学》
CSCD
北大核心
2022年第5期769-778,共10页
Computer Engineering & Science
基金
国家重点研发计划(2018YFB2202603)。
关键词
片上网络
现场可编程逻辑门阵列
功能验证
脉冲神经网络
类脑计算
network on chip
field programmable gate array(FPGA)
functional verification
spiking neural network(SNN)
neuromorphic computing
作者简介
陈小帆(1997-),男,湖南湘潭人,硕士生,研究方向为类脑计算和片上网络。E-mail:chenxiaofan19@nudt.edu.cn;杨智杰(1995-),男,云南昆明人,博士生,研究方向为类脑计算和计算机体系结构。E-mail:yangzhijie@nudt.edu.cn;彭凌辉(1997-),男,湖北荆门人,研究方向为片上网络。E-mail:penglinghui1997@163.com;王世英(1996-),男,河南郑州人,硕士,研究方向为类脑计算和片上网络。E-mail:wangshiying18@nudt.edu.cn;周干(1999-),男,湖南湘潭人,研究方向为片上网络。E-mail:1252691981@qq.com;李石明(1990-),男,湖南常德人,博士生,研究方向为片上网络。E-mail:lishiming@nudt.edu.cn;康子扬(1992-),男,安徽阜阳人,博士生,研究方向为类脑计算和片上网络。E-mail:kangziyang14@nudt.edu.cn;王耀(1983-),男,湖南湘潭人,博士,助理研究员,研究方向为超大规模集成电路,微处理器设计与实现,半导体器件性质与可靠性。E-mail:wangyaobsz@nudt.edu.cn;石伟(1982-),男,江苏涟水人,博士,副研究员,研究方向为计算机体系结构、微处理器设计和信息安全。E-mail:shiwei@nudt.edu.cn。
