摘要
随着电子电路集成化程度的不断提高,芯片电源分配网络的设计变得越来越复杂,尤其是高密度电路板设计中容易出现电源通道瓶颈问题。电源通道瓶颈导致局部区域出现高密度电流而引发电源失稳、压降过大甚至过热烧毁芯片或板材的现象。电源完整性(PI)工程师需要在工程设计过程中及时发现此类问题,并加以妥善解决。基于芯片载体PCB板,对电流密度与其导致温升的量化关系进行了深入研究。在实验测试基础上,对根据IPC-2152标准拟合的近似估算公式未考虑PCB板厚及板材差异等因素影响的缺陷进行了修正,并将修正后的量化关系运用于某通信设备核心处理器的电源通道的设计中,测试结果表明,该量化关系大大提高了通过电流密度与温升的关系计算发现电源通道瓶颈的准确率,能够有效避免由于导体电流温升超出系统温升要求而对系统性能带来严重影响,具有一定的工程应用价值。
Power distribution network of integrated chip is getting more and more complicated with the rapid development of integrated circuit. Especially easy to appear voltage instability, pressure drop too large and even burnout the component as bottleneck problem for power channel in HDI circuit board design. PI engineers need to find such problems and solve them in time. This paper further studies the quantitative relationship between current density and temperature rise of print circuit board(PCB) that based on chip carrier, revises the approximate estimation formula from IPC-2152 standard according experimental test to add the influence of PCB thickness or PCB material and so on. The modified quantization relation is applied to the design of power channel in a communication device, and the results show that it greatly improves the accuracy of finding faultiness. It has a great engineering application value in effectively avoiding the serious performance influence caused by the temperature rise of conductor exceed the requirement.
作者
王学
叶建芳
Wang Xue;Ye Jianfang(School of Information Science and Technology, Dong Hua University, Shanghai 201620, China)
出处
《电子测量技术》
2019年第11期87-91,共5页
Electronic Measurement Technology
基金
东华大学非线性科学研究所基金项目(231080001)资助
作者简介
王学,硕士研究生,主要研究方向为通信电子设计及信号仿真。E-mail:wmovie_wang@163.com;叶建芳,副教授,主要研究方向为射频电路及无线通信。
