摘要
串行的PCIe接口是第3代I/O互连标准,具有高速率和高带宽等特点,克服了传统PCI总线在系统带宽、传输速度等方面的固有缺陷,具有很好的应用前景。使用FPGA来设计基于PCIe总线的数据传输,可以降低硬件的设计成本,提高硬件集成度的同时还能利用FPGA的可编程特性提高设计的灵活性与适应性。在对PCIe总线、FPGA内嵌PCIe硬核结构以及PCIe传输报文进行简要概述的基础上,提出了一种在FPGA内嵌PCIe硬核的基础上实现DMA传输的解决方案,较为详细地阐述了设计方案,对设计进行了评估与分析,并给出了传输带宽的测试结果。
The serial PCIe interface is the third-generation I / O interconnection standard. Characterized by high speed and high bandwidth,it overcomes the inherent shortcomings of traditional PCI bus in system bandwidth and transmission speed,and has a good application prospect. Use of FPGA to design PCIe busbased data transmission can reduce the design cost of hardware and improve its integration level,as well as improving the design flexibility and adaptability by making use of the programmable feature of FPGA. Based on a brief overview of PCIe bus,PCIe hard core structure inserted into FPGA and PCIe transmission message,a solution to realize DMA transmission based on PCIe hard core inserted into FPGA is proposed,with a detailed description of the design proposal. An evaluation and analysis of the design is made,and the test results of transmission bandwidth are given.
出处
《电光与控制》
北大核心
2015年第7期84-88,共5页
Electronics Optics & Control
基金
装备预研共用技术基金(9140A16010311HK6101)
作者简介
邹晨（1987-），男，江苏南通人，硕士，研究方向为计算机系统结构。
