4Wang H, Delahaye J P,Leray P. Managing dynamic reconfiguration on MIMO Decoder [C]. Parallel and Distributed Processing Symposium, IPDPS 2007 IEEE International, 2007 : 1-8.
5Claus C,Stechele W,Kovatsch M. A comparison of embedded reconfigurable video-processing architectures [C]. Field Programmable Logic and Applications, 2008 FPL, 2008 : 587-590.
6Tamara Snowden. VisiCom uses xilinx FPGAs for a reconfigurable image processing module [EB/OL]. (2000 03-20). http ://www. visicom. com/.
7Sriram Swaminathan, Russell Tessier, Dennis Goeckel, et al. A dynamically reconfigurable adaptive viterbi decoder: proceedings of the 2002 ACM/SIGDA 10th International Symposium on Field-Programmable Gate Arrays[C]. 2002 : 227-236.
8Luo Jianwen,Jong Ching Chuen. A system-on-chip dynamically reconfigurable FPGA platform for matrix inversion [C]. Integrated Circuits, 2007 ISIC apos, International Symposium on Volume, Issue, 2007 : 465 468.
9Andrey Filippov. Encoding high-resolution ogg/ theora video with reeonfigurable FPGAs [J]. Xcell Journal : Second Quarter, 2005,53 (2) : 19-20.
10Christian Fda Silva,Alice M. RECASTER synthesis of fault tolerant embedded systems based on dynamically reconfigurable FPGAs [ C ]. Tokarnia Proceedings of the 18th International Parallel and Distributed Processing Symposium, 2004.