期刊文献+

EPA网络芯片验证与测试

Verification and Test of EPA Network Chip
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摘要 提出一种EPA网络芯片的验证方法。介绍EPA网络芯片的功能和结构,设计基于虚拟设备的EPA网络环境,从验证网络通信接口和调度正确性的角度,将设计的EPA网络芯片接入到已有EPA网络中进行测试。测试结果表明,该仿真系统的同步精度在1μs以内,能满足使用需求,且验证了现场可编程逻辑门阵列作为从时钟程序的稳定性。 This paper presents a verification method of a kind of Ethernet for Plant Automation(EPA) network chip. It Introduces the function and structure of the EPA network chip, designes a virtual equipment based on the EPA network environment. From the angle of network communication interface and scheduling verify correctness, this paper puts the EPA network chip into EPA network to test. Test results shows that the simulation system of synchronous precision is less than 1 s, can satisfy the using requirement, and verifies the stability of the Field Programmable Gate Array(FPGA) as subordinate clock program.
作者 陈鹏 冯冬芹
出处 《计算机工程》 CAS CSCD 2012年第8期264-267,共4页 Computer Engineering
基金 国家自然科学基金资助项目"工业实时多业务流网络模型及动态调度"(61074028/F030103)
关键词 EPA协议 仿真系统 通信调度管理实体 时钟同步 网络测试平台 Ethernet for Plant Automation(EPA) protocol simulation system Communication Schedule Management Entity(CSME) clocksynchronization network test platform
作者简介 陈鹏(1978-),男,硕士研究生,主研方向:EPA网络,芯片验证,网络测试 冯冬芹,教授E-mail:dqfeng@iipc.zju.edu.cn
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参考文献5

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