期刊文献+

高速数字解调中的并行处理算法 被引量:7

Parallel Processing Algorithms in High Rate Digital Demodulation
在线阅读 下载PDF
导出
摘要 在分析频域并行FIR滤波性能特点的基础上,提出了一种时域并行FIR滤波处理方案,该方案能以较低复杂度实现600 Mb/s以上数字调制信号的解调。还提出了一种基于多相滤波器组和并行处理的高精度符号同步方法,可以在不提高接收信号采样率和几乎不增加硬件复杂度的条件下,使符号同步精度提高一倍。最后给出了基于以上方法设计的原理样机的测试结果。 ome useful parallel processing algorithms for the demodulator in a high rate data communication system are presented,including parallel FIR filter,parallel symbol synchronization,and parallel carrier recovery.After analyzing the characteristics of frequency domain parallel FIR filtering,a time domain parallel processing scheme is proposed,which can implement a demodulator for 600 Mb/s digital modulation signal with quite low hardware complexity.The paper proposes a scheme of high precise symbol synchronization loop based on parallel processing and multi-phase filter,which can remarkably improve the synchronization accuracy without sampling rate increasing and almost with no extra complexity.Finally,some testing results of a prototype of high rate data communication system based on the above algorithms are given.
出处 《电子科技大学学报》 EI CAS CSCD 北大核心 2010年第3期340-345,共6页 Journal of University of Electronic Science and Technology of China
基金 国家自然科学基金(60572148)
关键词 高速解调 并行载波恢复 并行FIR滤波 并行符号同步 high rate demodulation parallel carrier recovery parallel FIR filter parallel symbol synchronization
作者简介 陈晖(1978-),男,博士生,主要从事卫星通信技术、高速数据传输技术、卫星有效载荷技术等方面的研究.
  • 相关文献

参考文献14

  • 1HEEGARD C,HELLER J A,VITERBI A J.A microprocessor-based PSK modem for packet transmission over satellite channels[J].IEEE Trans Commun,1978,26(5):552-564.
  • 2SARI H,MORIDI S.New phase and frequency detectors for carrier recovery in PSK and QAM systems[J].IEEE Trans Commun,1988,36(9):1035-1043.
  • 3CHEN Zhi-zhang(David),WILCOX R,SAMPSON A,et al.The implementation of a new all-digital phase-locked loop on an FPGA and its testing in a complete wireless transceiver architecture[C] // Seventh Annual Communications Networks and Services Research Conference.Moncton,Canada:CNSR,2009:238-244.
  • 4王俊胜.全数字BPSK/QPSK解调器原理和应用[J].无线电通信技术,1992,18(4):255-263. 被引量:11
  • 5SHIHONG D,YAMU H,SAWAN M.A high data rate QPSK demodulator for inductively powered electronics implants[C] //IEEE International Symposium on Circuits and Systems Island of Kos.Greece:IEEE,2006:2577-2580.
  • 6SRINIVASAN M,CHEN C,GREBOWSDY G,et al.An all-digital,high data-rate parallel receiver[C] //JPL TDA Progress Report.California:Jet Propulsion Labokatory,1997:42-131.
  • 7陈大夫,朱江,时信华,张尔扬.全数字宽带接收机的并行结构[J].飞行器测控学报,2003,22(1):54-59. 被引量:6
  • 8SHARMA S,KULKARNI S,PUJARI V K,et al.High data rate filter design for satellite communication[C] // 3rd International Conference on Recent Advances in Space Technologies,2007(RAST'07).[S.l.] :IEEE Press,2007.
  • 9蒋宗明,唐斌,吴伟.基于DFT滤波器组的多信号高效数字下变频[J].电子科技大学学报,2005,34(6):743-746. 被引量:5
  • 10丁玉美,高西全.数字信号处理[M].2版.西安:西安电子科技大学出版社,2002.

二级参考文献8

  • 1Proakis J G.Digital Communications, Fourth Edition[M].北京:电子工业出版社,2001..
  • 2吕洪生 杨新德.实用卫星通信工程[M].成都:电子科技大学出版社,1992..
  • 3姚彦 梅顺良 高葆新.数字微波中继通信工程[M].北京:人民邮电出版社,1992..
  • 4Eneman K, Marc M. DFT modulated filter bank design for oversampled subband systems[J]. Signal Processing,September, 2001,81:1 947-1 973.
  • 5Harris F J, Dick C, Rice M. Digital receivers and transmitters using polyphase filter banks for wireless communications[J]. IEEE T. Microwave Theory and Techniques, 2003,51:1 395-1 412.
  • 6国防科技大学一系1984、1985届硕士(博士)研究生论文题目及指导教师一览表[J]力学与实践,1986(01).
  • 7李滔,韩月秋.基于流水线CORDIC算法的三角函数发生器[J].系统工程与电子技术,2000,22(4):85-87. 被引量:33
  • 8傅延增,张海林,王育民.正交频分复用中的符号同步技术[J].西安电子科技大学学报,2000,27(3):335-339. 被引量:24

共引文献34

同被引文献45

引证文献7

二级引证文献17

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部