摘要
An error tolerant hardware efficient verylarge scale integration （VLSI） architecture for bitparallel systolic multiplication over dual base, which canbe pipelined, is presented. Since this architecture has thefeatures of regularity, modularity and unidirectionaldata flow, this structure is well suited to VLSIimplementations. The length of the largest delay pathand area of this architecture are less compared to the bitparallel systolic multiplication architectures reportedearlier. The architecture is implemented using Austria Micro System＇s 0.35 μm CMOS （complementary metaloxide semiconductor） technology. This architecture canalso operate over both the dual-base and polynomialbase.
An error tolerant hardware efficient verylarge scale integration （VLSI） architecture for bitparallel systolic multiplication over dual base, which canbe pipelined, is presented. Since this architecture has thefeatures of regularity, modularity and unidirectionaldata flow, this structure is well suited to VLSIimplementations. The length of the largest delay pathand area of this architecture are less compared to the bitparallel systolic multiplication architectures reportedearlier. The architecture is implemented using Austria Micro System＇s 0.35 μm CMOS （complementary metaloxide semiconductor） technology. This architecture canalso operate over both the dual-base and polynomialbase.
作者简介
Ashutosh Kumar Singh received the Ph.D. degree in electronics engineering from Banaras Hindu University, India, in 2000. Currently he is a faculty member with the Department of ECEC, School of Engineering and Science, Curtin University of Technology, Miri, Malaysia. He has published more than 50 research papers in different conferences and journals in these areas. He is a co-author of two books： Digital Systems Fundamentals and Computer System Organization and Architecture （Prentice Hall）. His research interests include verification, synthesis, design, and testing of digital circuits.（c-mail： ashutosh.s@curtin.cdu.my）.Asish Bera received B.E. degree in computer science and engineering from the University of Burdwan, India, in 2007 and is currently pursuing M.S. degree in VLSI design with School of VLSI Technology, Bengal Engineering and Science University, Shibpur, India. His research interests include VLSI Architecture for finite field Arithmetic.Hafizur Rahaman received his Ph.D. degree in computer science and engineering in 2003 from Jadavpur University, Calcutta, India. He is currently a professor of information technology in Bengal Engineering and Science University, Shibpur, India. His research interest includes logic synthesis and testing of VLSI circuits, fault-tolerant computing, design and testing of Galois field arithmetic circuits. He served in the organizing and programme committee of the International Conference on VLSI Design in 2000 nd 2005, and 2005 Asian Test Symposium （ATS）, 2007 IEEE VLSI Design and Test Workshop （VDAT）. He is a Member of the IEEE, the IEEE Computer Society, and ACM Sigda.（e-mail： hafizur@cs.bris.ac.uk,rahaman_h@hotmail.com）.Jimson Mathew received the Ph.D. degree in computer science in 2008 from University of Bristol, UK Since 2005, he has been with Department of Computer Science, University of Bristol, UK. His research interests primarily focuses on sigma delta converters, fault-tolerant computing, low power design and testing, and Galois field based arithmetic.e-mail： jimson @cs.bris.ac.ukDhiraj K. Pradhan is a currently professor in computer science at the University of Bristol （U.K.）. Prior to this, he held a professorship at the University of Massachusetts, Amherst, where he also served as Coordinator of Computer Engineering. He has also worked at the University of California, Berkeley,Oakland University （Michigan）, and the University of Regina, in Saskatchewan, Canada. Prof. Pradhan has contributed to very large scale integrated computer-aided design and test, as well as to fault-tolerant computing, computer architecture and parallel processing research, with major publications in journals and conferences, spanning more than 30 years. During this long career, he has been well-funded by various agencies in Canada, USA and UK.pmdhan@ cs.bris.ac.uk
