摘要
研究了空间通信用高速Reed-Solomon(255,223)码硬判决译码器的FPGA实现方法,提出一种新的纠错算法实现结构以最大程度提高译码器性能。设计中采用RiBM算法求解关键方程,并通过应用高速比特并行乘法器以及流水线和并行处理方法提高译码通过率。综合和测试验证结果显示,该译码器译码通过速率为1.7Gbit/s,译码延迟为296个时钟周期,优于目前同类型的RS译码器性能指标。
Reed Solomon （RS） code is a linear block code which has very strong capability of correcting random or burst errors. It has been widely used in various communication systems.A FPGA implementation of high speed RS（255,223） decoder used for space communication was presented and a new high speed error-correct architecture which using RiBM algorithm to solve the key equation for decoding Reed Solomon codes was given. Moreover, high speed bit parallel Galois field multiplier and pipelining methods were used to achieve maximum decoding speed. Synthesis and experiments results show that the FPGA implementation of the decoder achieves a throughput of 1.7Gbit/s and decode delay of 296 clocks, the performance is multiple times higher than conventional design＇s.
出处
《中国空间科学技术》
EI
CSCD
北大核心
2009年第5期75-83,共9页
Chinese Space Science and Technology
关键词
译码器算法
有限域
里德-索洛蒙码
空间数据系统体制
空间通信
RiBM decode algorithm ,Galois field ,Reed Solomon ,code, Consultative,Committee for space ,Data systems ,Space communication
作者简介
张拯宁：1979年生，2002年毕业于哈尔滨T业大学机械工程系，现为中国空间技术研究院飞行器设计专业在读研究生，研究方向为卫星数据传输与处理。
