摘要
为提高GPS基带芯片跟踪环路的性能,提出一种基于FPGA跟踪环路的具体设计与实现方案.研究了GPS接收机跟踪环路的基本原理,在分析现有算法的基础上,采用锁频环辅助锁相环、动态码环和载波环辅助码环策略,利用Xilinx公司FPGA软硬交互工作方式的优点,在一片FPGA芯片上实现整体方案.该设计方案可提高系统的运行效率,节省系统资源,降低硬件成本.试验结果验证了其可行性与有效性.
A design and implementation scheme of GPS receiver tracking loop based on FPGA was proposed to improve the performance of tracking loop. The basic theory of the GPS receiver tracking loop was studied and existing algorithms were analyzed. Using a FLL-assisted PLL loop, a dynamic code loop and a PLL-assisted DLL architecture and taking full advantages of the interworking between hardware and software in Xilinx＇ s FPGA, the scheme was implemented in one FPGA chip, which can improve operation efficiency of the system, save system resources and reduce costs. Test results verify the feasibility and validity of the scheme.
出处
《大连海事大学学报》
CAS
CSCD
北大核心
2009年第3期16-20,共5页
Journal of Dalian Maritime University
基金
国家自然科学基金资助项目(60572116)
作者简介
姜毅（1982-），女，山东烟台人，博士研究生，E—mail：jiangyi．dlmu@gmail．com．
通信作者：张淑芳（1955-），女，辽宁大连人，教授，博士生导师，E-mail：sfzhang@dlmu．edu．cn．
