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采用FPGA的高速数据采集系统 被引量:10

The system design of the high speed data acquisition based on FPGA
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摘要 本文介绍了一种应用于高速数据采集的数字系统,该系统由高速模数转换器FPGA,SDRAM(synchronous dynamic randomaccess memory)组成。该系统独立于处理器之外,给处理器预留了总线接口。任何的处理器只要把总线接口连接到此系统上,均可操作。与传统的数据采集系统相比,减少了处理器的控制,而且处理器的处理速度已不再影响系统的性能,提高了速度和效率,具有通用性。本文对高速模数转换器与FPGA的接口实现做了详细的描述,对如何把模数转换器的数据流进行缓冲做了介绍。并对如何在FPGA中构建SOPC(systerm on programmable chip)系统以及如何利用SOPC实现SDRAM的控制与存储进行了说明。经测试,本系统的数据采集的实时速度最高可达到250 MB/s,适用于大部分的高速数据采集场合。 A digital system applied in a high speed data acquisition is introduced in this paper. This system consists of A/D,FPGA,SDRAM. It is independent of the controller, and provides the bus interface. Any MCU can operate this system as long as it connects its bus to this system. Compared with the traditional high speed data acquisition, this system reduces the control of the MCU, and the speed of the MCU does not affect the performance of the system, so the efficiency and commonness is highly enhanced. In this paper, the high speed A/D converter, its interface of FPGA and how to make a high data stream buffer are described. How to build SOPC in FPGA and the use of SOPC to realize the control and storage of SDRAM are introduced. After testing, the system's real-time data acquisition rate is up to 250MBYTE/S, so it is applicable to most of the high-speed data acquisition occasions.
作者 童子权 贾俊
出处 《国外电子测量技术》 2008年第12期30-32,39,共4页 Foreign Electronic Measurement Technology
关键词 高速数据采集 FPGA 控制 存储 high speed data acquisition FPGA control storage
作者简介 童子权,硕士研究生,教授,主要研究方向乒测试计量技术及仪器。
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参考文献6

  • 1张伟,韩一明,吴新玲.基于FPGA的高速数据采集系统的设计[J].电力情报,2002(3):46-49. 被引量:34
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二级参考文献2

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