摘要
由于面向对象的Ｃ＋＋语言更贴近描述硬件对象的ＶＨＤＬ语言，用Ｃ＋＋实现翻译型ＶＨＤＬ模拟器，并利用Ｃ＋＋本身的编译器的优化功能，可以得到运行的时间和空间方面效率较高的ＶＨＤＬ模拟器．Ｖ２Ｃ＋＋的原型设计和初步实践表明，用Ｃ＋＋实现ＶＨＤＬ翻译性模拟器比解释性模拟器具有较高效率，利于较大规模的电路的模拟．
\ Since object oriented programming language C++ is closed nearly with VHDL,through the translation of a VHDL description by using C++ with its optimizing ability,a VHDL translation simulator with higher efficiency of running time and occupied memory space can be implemented.A prototype design of a translation simulator V2C++ is implemented.The preliminary practice shows that the VHDL translation simulator implemented with C++ has higher efficiency and that it is useful for simulation of a large scale circuit.
出处
《计算机辅助设计与图形学学报》
EI
CSCD
北大核心
1998年第2期167-172,共6页
Journal of Computer-Aided Design & Computer Graphics
关键词
V2C++语言
C++语言
VHDL语言
VHDL,simulator,interpretation simulator,translation simulator,high level simulation
