摘要
实现了串/并转换成帧器接口(SFI-5)的去斜移功能。该设计主要由去斜移通道的帧对齐模块和数据通道去斜移模块组成,其中的关键电路由窗口比较器与滑动窗口生成器配合工作实现。16个数据通道去斜移电路轮流工作,共用一个窗口比较器,提高了电路的工作速度,节省了资源。系统测试表明,该电路可纠正±160比特范围内的通道间斜移,可应用于40Gb/s甚短距离传输的VSR5系统。
This paper presents the deskew function in Serdes Framer Interface Level 5 （SFI-5） interface realized in an FPGA. The design is mainly consisted of the flame aligner of deskew channel and data channel deskew modules, the key part of which depends on the window comparison and a slip-window generator. 16 data channel deskew circuits works in turn and share one window comparison, improving the IC working speed and reducing circuit complexity greatly. Aon-system test is implemented in one Altera EP1SGX40GF1020C6 FPGA, with an Agilent 1682A logic analyzer. The test result indicates that the circuit can correct the skew between channels up to ±160 bits both reliably and steadily, which can be applied in actual 40Gb/s very short reach communication systems.
出处
《光通信技术》
CSCD
北大核心
2008年第9期1-4,共4页
Optical Communication Technology
基金
国家863计划(2006AA01Z239)资助
作者简介
任滨（1983-），女，硕士生，主要研究方向为光电集成电路、超高速集成电路。
