期刊文献+

板级电子封装跌落/冲击中焊点应力分析 被引量:12

Drop/Impact Stress Analysis of Solder Joints in Board Level Electronics Package
在线阅读 下载PDF
导出
摘要 建立了板级BGA封装跌落/冲击问题的三维有限元模型,采用Input-G方法对PCB板的变形及焊锡接点应力等动力学响应进行了分析,探讨了约束条件对计算结果的影响,对焊点剥离应力产生的机理进行了讨论,提出了快速估算焊点应力的等效静力学模型并分析了误差.结果表明,模型中PCB板固定螺栓处的约束条件处理对结果有较大影响,合理的处理方法是在PCB板4个螺栓作用区的上下表面均施加水平方向位移约束.焊点应力最大值出现在冲击后0.4 ms,最大剥离应力发生在角部焊点与PCB板一侧的铜垫交界处.焊点应力与PCB板的弯曲变形密切相关,应力峰值和PCB板的变形峰值在时间上具有同步性.挠度等效静力学模型得到的焊点应力比动力学模型高23%左右. A 3-D finite element model of board level BGA package was built and the Input-G method was used to analyze dynamic solder joint stress in the package during drop/impact. Boundary condition, bolt effects of the test board and peeling stress mechanism were emphasized in current investigation. An equivalent static model that can evaluate stress quickly was proposed. The results show that bolt constraints have a significant influence on the dynamic stress in solder joints. The bolt constraints must be treated as zero horizontal dis- placement in the area the bolt acted in the numerical model. The stress in the solder joint reaches its peak at 0.4ms and the maximum peeling stress is located at the most outer corner of the package. The peeling stress is dominated by the deflection of the PCB board. The equivalent static model predicts the same stress distribution in the package but overestimates the stress about 23 %.
出处 《北京工业大学学报》 EI CAS CSCD 北大核心 2007年第10期1038-1043,共6页 Journal of Beijing University of Technology
基金 国家自然科学基金(10572010) 北京市教委科技发展计划项目(KM200610005013) 北京市先进制造技术重点实验室开放课题资助项目(102KB00732).
关键词 电子封装 跌落/冲击 焊锡接点 可靠性 有限元 electronics package drop/impact solder joints reliability finite element
作者简介 秦飞(1965-),男,河南新郑人,副教授.
  • 相关文献

参考文献12

  • 1周春燕,余同希,李世玮.便携式电子产品的跌落冲击响应——试验,仿真和理论[J].力学进展,2006,36(2):239-246. 被引量:12
  • 2WU Ja-son,SONG Guo-shu,YEH Chao-pin,et al.Drop/impact simulation and test validationof telecommunication products[C]// Proceedings of the 1998 6th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems.Piscataway,NJ:IEEE,1998.
  • 3ZHU L.Submodeling technique for BGA reliability analysis of CSP rackaging subjected to an impact loading[C] // Pacific Rim/International,Intersociety Electronic Packaging Technical/Business Confcrence and Exhibition,Kauai,New York:American Society of Mechanical,2001:1401-1409.
  • 4SOGO,T,HARA,S.Estimation of fall Impact strength for BGA soldcr joints[C]//ICEP Conference Proc.,Japan:IEEE,2001.
  • 5NG Hun-shen,TEE Tong-yan,LUAN Jing-en.Design for standard impact pulses of drop tester using dynamic simulation[C]//Proceedings of 6th Electronics Packaging Technology Conference,Piscataway:IEEE,2004.
  • 6TEE Tong Yan,LUAN Jing-en,PEK Eric,et al.Novel numerical and experimental analysis of dynamic responses under board level drop test[C]//Proceedings of the 5th International Conference on Thermal and Mechanical Simulation and Experiments in Microelectronics and Microsystems,New York:IEEE,2004.
  • 7JEDEL Solid state technology association,Board Level Drop Test Method of Components for Handheld Electronic Products JESD22-B111[S],Arlington:JEDEL Solid State Technology Association,2003.
  • 8JEDEC Solid State Technology Association,Subassembly Mechanical Shock JESD22-B110[S],Arlington:JEDEL Sclid State Technology Association,2001.
  • 9TEE Tong-yan,NG Hun-shen,LIM Chwee Teck,et al.Impact life prediction modeling of TFBGA packages under board level drop test[J].Microelectronics Reliability,2004,44(7):1131-42.
  • 10TEE Tong-tan,LUAN Jing-en,PEK Eric,et al.Advanced experimental and simulation techniques for analysis of dynamic responses during drop impact[C]//Proceedings 54th Electronic Components and Technology Conference,Las Vegas:NV USA,2004.

二级参考文献73

  • 1Armistead T M.Protective carrying case and method for making same.US Patent No.5,816,459,filed on November12,1997.
  • 2Lee C Y,Choi P K.Portable electronic apparatus with elements for preventing shock and water.US Patent 5,844,772,filed on April 25,1995.
  • 3Sadow B D.Securement of portable electronic equipment in carrying case.US Patent 6,116,418,filed on May 3,1999.
  • 4Kim T Y.Structure for protecting electronic systems from impact and portable computer with such a structure.US Patent 6,151,207,filed on November 30,1998.
  • 5Moncrief M L,Maxwell D W.Protective holder for portable electronic device.US Patent 6,179,122,filed on Nomveber10,1999.
  • 6Burleson W S,Selker E J.Impact-resistant electronic device.US Patent 6,522,763,filed on August 13,1998.
  • 7American Society for Testing and Materials,ANSI/ ASTM D3332-93.Standard Test Methods for Mechanical-Shock Fragility of Products,Using Shock Machines.Annual Book of ASTM Standards,Vol.15.09,September,1993.
  • 8JESD22-B110.Subassembly Mechanical Shock Test Method,JEDEC Solid State Technology Association,Arlington,2001.
  • 9JESD22-B111.Board Level Drop Test Method of Components for Handheld Electronic Products,JEDEC Solid State Technology Association,Arlington,July 2003.
  • 10Wu J,Song G,Yeh C P,Wyatt K.Drop/impact simulation and test validation of telecommunication product.In:Proceeding of Sixth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic System,ITherm'98,IEEE.1998-05-27~30,1998.330~336.

共引文献11

同被引文献90

引证文献12

二级引证文献43

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部