摘要
设计了一种用FPGA实现MPEG-4编码器方案。为进一步提高编码的效率,在算法和结构方面进行了优化。提出了带有判全零系数的Loeffler快速DCT算法,并采用"十字"形运动估计算法,设计了高度并行、紧凑流水线的FPGA实现方案。用Verilog HDL硬件描述语言编写了代码,在QUARTUS II集成开发环境下,进行了FPGA(Field-Programmable Gate Array)系统仿真验证。测试结果表明,该设计编码高效,符合实时视频通信的需求。可广泛应用于移动视频通信和远程无线监控等领域。
A scheme of MPEG- 4 video simple profile encoder is implemented based on FPGA. In order to accelerate the efficiency encoded further, an optimization design was done on algorithm and architecture. Loeffler fast DCT algorithm with judging the coefficient of whole zero was developed ,rood pattern motion estimation algorithm was used and a FPGA implementing method adopting highly-parallel and compact pipelining architecture was designed. The code was designed by using Verilog HDL and in QUARTUS Ⅱ integrated development environment, the design was verified by simulation and was implemented on FPGA. According to testing, the result is hoped .
出处
《微计算机信息》
北大核心
2007年第26期214-216,222,共4页
Control & Automation
基金
国家自然科学基金资助项目(60573046)
作者简介
陈祖爵（1951-），男，副教授，硕士生导师，研究方向为嵌入式系统、网络技术；通讯地址：（212013江苏镇江江苏大学（本部）二区25栋301室）陈祖爵
韩云（1980-），男，硕士生，研究方向为嵌入式系统、视频压缩；
鞠时光（1955-），男，教授，博士生导师，研究方向为空间数据库、可视计算。
