期刊文献+

6H-SiC NMOS与PMOS温度特性分析 被引量:3

Analyses of the temperature properties of the 6H-SiC NMOS and PMOS
在线阅读 下载PDF
导出
摘要 考虑界面态电荷高斯分布模型以及Poole-Frenkel效应,对SiC MOSFET补偿电流源模型进行了修正,分析了造成6H-SiC NMOS与PMOS器件补偿电流源变化的原因.结果表明:界面态电荷的非均匀分布造成由阈值电压漂移引起的输出漏电流改变量随温度的升高逐渐减小;漏衬界面缺陷是造成体漏电流较大(达到微安量级)的主要因素,且缺陷密度越大,该值随温度增长的速度越快. The analytical model which comprises the temperature compensation for the SiC MOSFET is modified by considering the Gauss model of interface state density and the Poole-Frenkel effect. The simulation results for the 6H-SiC NMOS and PMOS show that as the non-uniformity distribution of interface state density, the percentage of current change due to the threshold voltage becomes smaller when the temperature is increased, the main reason for the large leakage current is the existence of surface defects. The larger the defect density, the more rapidly the current value increases with the temperature.
作者 韩茹 杨银堂
出处 《西安电子科技大学学报》 EI CAS CSCD 北大核心 2007年第1期16-20,共5页 Journal of Xidian University
基金 教育部重点科技项目(02074) 国家部委预研项目(513080302)
关键词 碳化硅 补偿电流源 冻析效应 普尔-弗兰克效应 体漏电流 SiC compensating current elements freeze-out effect Poole-Frenkel effect body leakage current
作者简介 韩茹(1981-),女,西安电子科技大学博士研究生.
  • 相关文献

参考文献3

二级参考文献24

  • 1王平,杨银堂,屈汉章.n型4H-SiC电子霍耳迁移率解析模型[J].西安电子科技大学学报,2004,31(4):538-542. 被引量:1
  • 2张玉明.碳化硅材料与器件的研究,博士学位论文[M].西安交通大学,1998..
  • 3Schorner R, Friedrichs P, Peters D. Detailed Investigation of N Channl Enhancement 6H-SiC MOSFET[J]. IEEE Trans on Electron Devices, 1999, 46(3): 533-540.
  • 4Hasanuzzama M, Islam S K, Tolbert L M. Effects of Temperature Variation (300-600K) in MOSFET Modeling in 6H-Silicon Carbide[J]. Solid State Electronics, 2004, 48(3): 125-132.
  • 5Xie W, Cooper J A, Melloch M R. Monolithic NMOS Digital Integrated Circuits in 6H-SiC[J]. IEEE Electron Device Letters, 1994, 15(6): 455-457.
  • 6Schmid U, Sheppard S T, Wondrak W. High Temperature Performance of NMOS Integrated Inverters and Ring Oscillators in 6H-SiC[J]. IEEE Trans on Electron Devices, 2000, 47(4): 687-691.
  • 7Slater D B Jr, Lipkin L A, Johnson G M, et al. High Temperature Enhancement-mode NMOS and PMOS Devices and Circuits in 6H-SiC[A]. IEEE Device Research Conference[C]. Charlottesville: IEEE, 1995. 100-103.
  • 8Avant! Corporation. Medici Two-Dimensional Device Simulation Program Version 4.1 User Manual[Z]. California: TACAD Business Unit, 1998.
  • 9Ryu S H, Kornegay K T. Digital CMOS ICs in 6H-SiC Operating on a 5V Power Supply[J]. IEEE Trans on Electron Devices, 1998, 45(1): 45-52.
  • 10Levinshtein M E, Rumyantsev S L, Michael S S. Properties of Advanced Semiconductor Materials[M]. New York: John Wiley & Sons, 2001.

共引文献16

同被引文献11

  • 1易清明,张静,石敏.低功耗CMOS集成运算放大器的研究与设计[J].微电子学,2007,37(3):414-416. 被引量:18
  • 2IKEDA H,TAKAKUBO H.Current zero temperature coefficient point for CMOS temperature-voltage converter operating in strong inversion[J].IEICE Trans on Fundamentals of Electronics Communications and Computer Sciences,2004,E87A(2):370-375.
  • 3REBELLO N S,SHOUCAIR F S,PALMOUR J W.6H-Silicon Carbide MOSFET modeling for high temperature analogue integrated circuits(25-500℃)[J].IEE ProCircuits Devices Syst,1996,143(2):115-122.
  • 4HASANUZZAMAN M D,SYED K I,LEON M T.Effects of temperature variation(300-600K) in MOSFET modeling in 6H-Silicon Carbide[J].solid-State Electronics,2004,48(1):125-132.
  • 5SEI HYONG R,KEVIN T K,JAIUES A C,et al.Digital CMOS IC's in 6H-SiC Operating on a 5-V Power Supply[J].IEEE Trans on ED,1998,45(1):45-53.
  • 6SHOUCAIR F S.Design Consideration in high temperature analog CMOS integrated circuits[J].IEEE Trans,1986,CHMT-9(3):242.
  • 7RYU S-H, KORNEGAY K T, JAMES A, et al. Digital CMOS IC's in 6H-SiC operating on a 5-V power supply [J]. IEEE Trans Elec Dev, 1998, 45(1): 45- 53.
  • 8JAMISON P, STEPHENS J. High temperature 6HSiC CMOS temperature sensing circuit and AIM-Spice device simulation [Z]. For: Professor Michael Shur, Semiconductor Devices and Models Ⅰ, Rensselaer Polytechnic Institute, Troy, NY 1280 December 10, 1998.
  • 9SHOUCAIR F S. Design consideration in high temperature analog CMOS integrated circuits [J]. IEEE Trans Components, Hybrids, and Manufacturing Technology, 1986, 9 (3) : 242.
  • 10REBELLO N S, SHOUCAIR F S, PALMOUR J W. 6H-Silicon carbide MOSFET modeling for high temperature analogue integrated circuits (25-500 ℃)[J]. IEE Proc Circ Dev Syst, 1996, 143(2): 115-122.

引证文献3

二级引证文献7

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部