摘要
数字滤波器有软件和硬件实现两种方法 ,主要讨论了时分复用乘法器的硬件方式 ,基于CPLD实现数字滤波器 ,并以一个 17阶的FIR低通数字滤波器为例说明了该数字滤波器的实现及仿真过程。
Implementation of Digital filter can be based on software and hardware. Time Division Multiplex is used to design digital filter on CPLD by the topic. As an example, a 17-rank FIR low passing Digital Filter is given to discuss the approach with FLEX10K20 of Altera Company, and the emulation is done.
出处
《西南科技大学学报》
CAS
2004年第2期1-6,共6页
Journal of Southwest University of Science and Technology
