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基于Box-Muller、Tausworthe和DDS的FPGA噪声和干扰信号生成方法 被引量:1

Generation Method of FPGA Noise and Interference Signal Based on Box-Muller,Tausworthe and DDS
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摘要 研究白噪声和正弦干扰信号的生成机制,提出基于Box-Muller算法、Tausworthe算法、直接数字频率合成(DDS)的FPGA噪声和干扰信号生成方法。在噪声生成方法中,应用Box-Muller算法与Tausworthe算法形成服从高斯分布的随机变量,首先利用Tausworthe算法生成均匀分布的随机变量;接着利用Box-Muller算法用于把随机变量转换为服从高斯分布的随机变量;再通过3个线性反馈寄存器(LFSR)得到随机长度达到2^(88)的随机序列。在干扰信号生成方法中,使用切比雪夫级数近似对数、正弦等函数,应用DDS技术生成查找表并存储于ROM中,以降低硬件复杂度、减少硬件资源消耗。生成方法融合了DDS技术,将调频波分解为一个载频信号分量与多对变频旁瓣分量,实现扫频干扰信号的调制。仿真分析及工程实践表明:该算法可应用于各主流FPGA中,算法仅需1767个查找表、915个FIFO存储、48个8位的数字信号处理单元以及2.5个36 k内存等资源,即可获得浮点误差仅为千分之一的两路噪声信号,具有较强的工程实践意义。 The generation mechanism of white noise and sinusoidal interference signal was studied,and the generation method of FPGA noise and interference signal based on Box-Muller algorithm,Tausworthe algorithm and Direct Digital-Frequency Synthesis(DDS)was proposed.In the noise generation method,Box-Muller algorithm and Tausworthe algorithm were used to form random variables that obey Gaussian distribution.First,the Tausworth algorithm was used to generate random variables with uniform distribution;and then,the Box-Muller algorithm was used to convert random variables into random variables with Gaussian distribution;and lastly,random sequences with random length were obtained through 3 Linear Feedback Shift Registers(LFSR).In the interference signal generation method,Chebyshev series was used to approximate functions such as logarithm and sine,and by applying DDS technology,the Look Up Table was generated and stored in the ROM to reduce hardware complexity and hardware resource consumption.The generation method integrates DDS technology,decomposes the frequency modulated wave into a carrier frequency signal component and multiple pairs of frequency conversion sidelobe components,thus realizing the modulation of the frequency modulation of the sweep interference signal.Simulation analysis and engineering practice show that the algorithm can be applied to mainstream FPGA.The algorithm only needs 1767 Look Up Tables,915 FIFO memories,488-bit digital signal processing units and 2.536 k memories to obtain two noise signals with floating-point error of only one thousandth,with a strong engineering practical significance.
作者 刘璐 戎瑞亚 李海斌 LIU Lu;RONG Ruiya;LI Haibin(Zhejiang Ocean University,School of Marine Engineering Equipment,Zhoushan 316000,China;Zhejiang Ocean University,School of Information Engineering,Zhoushan 316000,China)
出处 《工业技术创新》 2021年第6期119-126,共8页 Industrial Technology Innovation
关键词 信号发生器 白噪声 正弦干扰信号 FPGA 线性反馈寄存器(LFSR) Signal Generator White Noise Sinusoidal Interference Signal FPGA Linear Feedback Shift Register(LFSR)
作者简介 通信作者:刘璐(1996-),女,硕士研究生,就读于浙江海洋大学海洋工程装备学院。主要研究方向:船舶导航数据处理及电子信息系统设计。E-mail:1498315071@qq.com;戎瑞亚(1969-),女,硕士,副教授。主要研究方向:渔业装备。从事机械设计制造及其自动化、机械电子工程、海洋工程与技术等专业的教学与科学研究工作;李海斌(1981-),男,博士。主要研究方向:人工智能及海洋信息处理。从事人工智能算法在各类风险评估模型中的应用,专注于使用智能信息技术规避航运风险。
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