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IPM模块抗ESD能力研究

Study on the ESD resistance of IPM
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摘要 为研究IPM ESD失效的原因,提出解决ESD问题的办法,遂进行了ESD回路理论分析及实验验证。由于驱动IC内部有ESD二极管结构,会导致在IPM某两个引脚上打ESD时,ESD电压通过驱动IC内部的ESD二极管传输到IGBT的栅极上,导致IPM ESD失效。 In order to study the reason of IPM ESD failure and put forward the method to solve the ESD problem,the theoretical analysis and experimental verification of ESD loop are carried out.Because there is an ESD diode structure inside the driving IC,it will cause ESD voltage to be transmitted to the gate of IGBT through the ESD diode inside the driving IC when ESD is applied on one or two pins of IPM,resulting in IPM ESD failure.
作者 冯宇翔 FENG Yuxiang(Guangdong Midea Refrigeration Equipment Co.,Ltd.,Shunde 528311)
出处 《家电科技》 2020年第4期85-87,共3页 Journal of Appliance Science & Technology
关键词 静电 智能功率模块 IGBT Static electricity Intelligient power module IGBT
作者简介 冯宇翔,fengyx@midea.com
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  • 1王大睿.CMOS电路中ESD保护结构的设计[J].中国集成电路,2007,16(6):37-41. 被引量:8
  • 2MIL-STD-883C method 3015.7, Military Standard Test Methods and Proc. For Microelectronics[DB].Dept. of Defense, Washington, D. C., U.S.A., 1989.
  • 3Ming-Dou Ker and Tain-Shun Wu, ESD Protection forSubmicron CMOS IC's--A Tutorial[DB].CCL Technical Journal, 1995,42: 10-24.
  • 4T. J. Maloney and N. Khurana. Transmission Line Plising Techniques for Circuit Modeling of ESD Phenomena[DB]. EOS/ESD Symposium Proceedings, EOS-7, 1985.49-54.
  • 5C. Duvvury, R. N. Rountree, and O. Adams. Internal chip ESD phenomena beyond the protection circuit[DB].lEEE Trans. on Electron Devices, 1988,35(12): 2133-2139.
  • 6H. Terletzki, W. Nikutta, and W. Reczek. Influence of the series resistance of on-chip power supply buses on internal device failure after ESD stress[DB]. IEEE Trans. on Electron Devices, 1993,40(11): 2081-2083.
  • 7M. D. Jaffe and E E. Cottrell. Electrostatic discharge protection in a 4-Mbit DRAM[DB]. EOS/ESD Symp. Proc., EOS-12, 1990.218-223.
  • 8C. Cook and S. Daniel. Characterization of new failure mechanisms arising from power-pin ESD stressing[DB]. EOS/ESD Symp. Proc., EOS-15, 1993.149-156.
  • 9EOS/ESD Standard for ESD Sensitivity Testing[DB]. EOS/ ESD Association, NY., 1993.
  • 10C.-N. Wu, M.-D. Ker, et al. Unexpected ESD damage on internal circuits of sub-gin CMOS technology[DB].Proc, of International Electron Devices and Materials Symposium, 1996.143-146.

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