Photonic computing has emerged as a promising technology for the ever-increasing computational demands of machine learning and artificial intelligence.Due to the advantages in computing speed,integrated photonic chips...Photonic computing has emerged as a promising technology for the ever-increasing computational demands of machine learning and artificial intelligence.Due to the advantages in computing speed,integrated photonic chips have attracted wide research attention on performing convolutional neural network algorithm.Programmable photonic chips are vital for achieving practical applications of photonic computing.Herein,a programmable photonic chip based on ultrafast laser-induced phase change is fabricated for photonic computing.Through designing the ultrafast laser pulses,the Sb film integrated into photonic waveguides can be reversibly switched between crystalline and amorphous phase,resulting in a large contrast in refractive index and extinction coefficient.As a consequence,the light transmission of waveguides can be switched between write and erase states.To determine the phase change time,the transient laser-induced phase change dynamics of Sb film are revealed at atomic scale,and the time-resolved transient reflectivity is measured.Based on the integrated photonic chip,photonic convolutional neural networks are built to implement machine learning algorithm,and images recognition task is achieved.This work paves a route for fabricating programmable photonic chips by designed ultrafast laser,which will facilitate the application of photonic computing in artificial intelligence.展开更多
Convolutional neural networks(CNNs) exhibit excellent performance in the areas of image recognition and object detection, which can enhance the intelligence level of spacecraft. However, in aerospace, energetic partic...Convolutional neural networks(CNNs) exhibit excellent performance in the areas of image recognition and object detection, which can enhance the intelligence level of spacecraft. However, in aerospace, energetic particles, such as heavy ions, protons, and alpha particles, can induce single event effects(SEEs) that lead CNNs to malfunction and can significantly impact the reliability of a CNN system. In this paper, the MNIST CNN system was constructed based on a 28 nm systemon-chip(SoC), and then an alpha particle irradiation experiment and fault injection were applied to evaluate the SEE of the CNN system. Various types of soft errors in the CNN system have been detected, and the SEE cross sections have been calculated. Furthermore, the mechanisms behind some soft errors have been explained. This research will provide technical support for the design of radiation-resistant artificial intelligence chips.展开更多
The space-air-ground integrated network(SAGIN)combines the superiority of the satellite,aerial,and ground communications,which is envisioned to provide high-precision positioning ability as well as seamless connectivi...The space-air-ground integrated network(SAGIN)combines the superiority of the satellite,aerial,and ground communications,which is envisioned to provide high-precision positioning ability as well as seamless connectivity in the 5G and Beyond 5G(B5G)systems.In this paper,we propose a three-dimensional SAGIN localization scheme for ground agents utilizing multi-source information from satellites,base stations and unmanned aerial vehicles(UAVs).Based on the designed scheme,we derive the positioning performance bound and establish a distributed maximum likelihood algorithm to jointly estimate the positions and clock offsets of ground agents.Simulation results demonstrate the validity of the SAGIN localization scheme and reveal the effects of the number of satellites,the number of base stations,the number of UAVs and clock noise on positioning performance.展开更多
The Metropolitan Area Network (MAN) has faced serious problems after years of rapid development. The model of three-dimensional IP-based MAN, proposed by ZTE, is a next-generation MAN solution, which not only solves t...The Metropolitan Area Network (MAN) has faced serious problems after years of rapid development. The model of three-dimensional IP-based MAN, proposed by ZTE, is a next-generation MAN solution, which not only solves the existing problems but also brings new ideas for the development of next-generation MAN.展开更多
The single event effects(SEEs)evaluations caused by atmospheric neutrons were conducted on three different convolutional neural network(CNN)models(Yolov3,MNIST,and ResNet50)in the atmospheric neutron irradiation spect...The single event effects(SEEs)evaluations caused by atmospheric neutrons were conducted on three different convolutional neural network(CNN)models(Yolov3,MNIST,and ResNet50)in the atmospheric neutron irradiation spectrometer(ANIS)at the China Spallation Neutron Source(CSNS).The Yolov3 and MNIST models were implemented on the XILINX28-nm system-on-chip(So C).Meanwhile,the Yolov3 and ResNet50 models were deployed on the XILINX 16-nm Fin FET Ultra Scale+MPSoC.The atmospheric neutron SEEs on the tested CNN systems were comprehensively evaluated from six aspects,including chip type,network architecture,deployment methods,inference time,datasets,and the position of the anchor boxes.The various types of SEE soft errors,SEE cross-sections,and their distribution were analyzed to explore the radiation sensitivities and rules of 28-nm and 16-nm SoC.The current research can provide the technology support of radiation-resistant design of CNN system for developing and applying high-reliability,long-lifespan domestic artificial intelligence chips.展开更多
The network on chip（NoC）is used as a solution for the communication problems in a complex system on chip（SoC）design.To further enhance performances,the NoC architectures,a high level modeling and an evaluation met...The network on chip（NoC）is used as a solution for the communication problems in a complex system on chip（SoC）design.To further enhance performances,the NoC architectures,a high level modeling and an evaluation method based on OPNET are proposed to analyze their performances on different injection rates and traffic patterns.Simulation results for general NoC in terms of the average latency and the throughput are analyzed and used as a guideline to make appropriate choices for a given application.Finally,a MPEG4 decoder is mapped on different NoC architectures.Results prove the effectiveness of the evaluation method.展开更多
Several challenging issues,such as the poor conductivity of sulfur,shuttle effects,large volume change of cathode,and the dendritic lithium in anode,have led to the low utilization of sulfur and hampered the commercia...Several challenging issues,such as the poor conductivity of sulfur,shuttle effects,large volume change of cathode,and the dendritic lithium in anode,have led to the low utilization of sulfur and hampered the commercialization of lithium–sulfur batteries.In this study,a novel three-dimensionally interconnected network structure comprising Co9 S8 and multiwalled carbon nanotubes(MWCNTs)was synthesized by a solvothermal route and used as the sulfur host.The assembled batteries delivered a specific capacity of1154 m Ah g-1 at 0.1 C,and the retention was 64%after 400 cycles at 0.5 C.The polar and catalytic Co9 S8 nanoparticles have a strong adsorbent effect for polysulfide,which can effectively reduce the shuttling effect.Meanwhile,the three-dimensionally interconnected CNT networks improve the overall conductivity and increase the contact with the electrolyte,thus enhancing the transport of electrons and Li ions.Polysulfide adsorption is greatly increased with the synergistic effect of polar Co9 S8 and MWCNTs in the three-dimensionally interconnected composites,which contributes to their promising performance for the lithium–sulfur batteries.展开更多
Spiking neural networks(SNNs)utilize brain-like spatiotemporal spike encoding for simulating brain functions.Photonic SNN offers an ultrahigh speed and power efficiency platform for implementing high-performance neuro...Spiking neural networks(SNNs)utilize brain-like spatiotemporal spike encoding for simulating brain functions.Photonic SNN offers an ultrahigh speed and power efficiency platform for implementing high-performance neuromorphic computing.Here,we proposed a multi-synaptic photonic SNN,combining the modified remote supervised learning with delayweight co-training to achieve pattern classification.The impact of multi-synaptic connections and the robustness of the network were investigated through numerical simulations.In addition,the collaborative computing of algorithm and hardware was demonstrated based on a fabricated integrated distributed feedback laser with a saturable absorber(DFB-SA),where 10 different noisy digital patterns were successfully classified.A functional photonic SNN that far exceeds the scale limit of hardware integration was achieved based on time-division multiplexing,demonstrating the capability of hardware-algorithm co-computation.展开更多
As a nanometer-level interconnection,the Optical Network-on-Chip(ONoC)was proposed since it was typically characterized by low latency,high bandwidth and power efficiency. Compared with a 2-Dimensional(2D)design,the 3...As a nanometer-level interconnection,the Optical Network-on-Chip(ONoC)was proposed since it was typically characterized by low latency,high bandwidth and power efficiency. Compared with a 2-Dimensional(2D)design,the 3D integration has the higher packing density and the shorter wire length. Therefore,the 3D ONoC will have the great potential in the future. In this paper,we first discuss the existing ONoC researches,and then design mesh and torus ONoCs from the perspectives of topology,router,and routing module,with the help of 3D integration. A simulation platform is established by using OPNET to compare the performance of 2D and 3D ONoCs in terms of average delay and packet loss rate. The performance comparison between 3D mesh and 3D torus ONoCs is also conducted. The simulation results demonstrate that 3D integration has the advantage of reducing average delay and packet loss rate,and 3D torus ONoC has the better performance compared with 3D mesh solution. Finally,we summarize some future challenges with possible solutions,including microcosmic routing inside optical routers and highly-efficient traffic grooming.展开更多
Modulating both the clock frequency and supply voltage of the network-on-chip （NoC） during runtime can reduce the power consumption and heat flux, but will lead to the increase of the latency of NoC. It is necessary...Modulating both the clock frequency and supply voltage of the network-on-chip （NoC） during runtime can reduce the power consumption and heat flux, but will lead to the increase of the latency of NoC. It is necessary to find a tradeoff between power consumption and communication latency. So we propose an analytical latency model which can show us the relationship of them. The proposed model to analyze latency is based on the M/G/1 queuing model, which is suitable for dynamic frequency scaling. The experiment results show that the accuracy of this model is more than 90%.展开更多
Metastasis is the leading cause of most cancer deaths, as opposed to dysregulated cell growth of the primary tumor. Molecular mechanisms of metastasis have been studied for decades and the findings have evolved our un...Metastasis is the leading cause of most cancer deaths, as opposed to dysregulated cell growth of the primary tumor. Molecular mechanisms of metastasis have been studied for decades and the findings have evolved our understanding of the progression of malignancy. However, most of the molecular mechanisms fail to address the causes of cancer and its evolutionary origin, demonstrating an inability to find a solution for complete cure of cancer. After being a neglected area of tumor biology for quite some time, recently several studies have focused on the impact of the tumor microenvironment on cancer growth. The importance of the tumor microenvironment is gradually gaining attention, particularly from the per- spective of biophysics. In vitro three-dimensional （3-D） metastatic models are an indispensable platform for investigating the tumor microenvironment, as they mimic the in vivo tumor tissue. In 3-D metastatic in vitro models, static factors such as the mechanical properties, biochemical factors, as well as dynamic factors such as cell-cell, cell-ECM interactions, and fluid shear stress can be studied quantitatively. With increasing focus on basic cancer research and drug development, the in vitro 3-D models offer unique advantages in fundamental and clinical biomedical studies.展开更多
In recent years,space-division multiplexing(SDM)technology,which involves transmitting data information on multiple parallel channels for efficient capacity scaling,has been widely used in fiber and free-space optical...In recent years,space-division multiplexing(SDM)technology,which involves transmitting data information on multiple parallel channels for efficient capacity scaling,has been widely used in fiber and free-space optical communication sys-tems.To enable flexible data management and cope with the mixing between different channels,the integrated reconfig-urable optical processor is used for optical switching and mitigating the channel crosstalk.However,efficient online train-ing becomes intricate and challenging,particularly when dealing with a significant number of channels.Here we use the stochastic parallel gradient descent(SPGD)algorithm to configure the integrated optical processor,which has less com-putation than the traditional gradient descent(GD)algorithm.We design and fabricate a 6×6 on-chip optical processor on silicon platform to implement optical switching and descrambling assisted by the online training with the SPDG algorithm.Moreover,we apply the on-chip processor configured by the SPGD algorithm to optical communications for optical switching and efficiently mitigating the channel crosstalk in SDM systems.In comparison with the traditional GD al-gorithm,it is found that the SPGD algorithm features better performance especially when the scale of matrix is large,which means it has the potential to optimize large-scale optical matrix computation acceleration chips.展开更多
The networks-on-chip （NoC） communication has an increasingly larger impact on the system power consumption and performance. Emerging technologies, like surface wave, are believed to have lower transmission latency a...The networks-on-chip （NoC） communication has an increasingly larger impact on the system power consumption and performance. Emerging technologies, like surface wave, are believed to have lower transmission latency and power consumption over the conventional wireless NoC. Therefore, this paper studies how to optimize the network performance and power consumption by giving the packet-switching fabric and traffic pattern of each application. Compared with the conventional method of wire-linked, which adds wireless transceivers by using the genetic algorithm （GA）, the proposed maximal declining sorting algorithm （MDSA） can effectively reduce time consumption by as much as 20.4% to 35.6%. We also evaluate the power consumption and configuration time to prove the effective of the proposed algorithm.展开更多
A variation-aware task mapping approach is proposed for a multi-core network-on-chips with redundant cores, which includes both the design-time mapping and run-time scheduling algorithms. Firstly, a design-time geneti...A variation-aware task mapping approach is proposed for a multi-core network-on-chips with redundant cores, which includes both the design-time mapping and run-time scheduling algorithms. Firstly, a design-time genetic task mapping algorithm is proposed during the design stage to generate multiple task mapping solutions which cover a maximum range of chips. Then, during the run, one optimal task mapping solution is selected. Additionally, logical cores are mapped to physically available cores. Both core asymmetry and topological changes are considered in the proposed approach. Experimental results show that the performance yield of the proposed approach is 96% on average, and the communication cost, power consumption and peak temperature are all optimized without loss of performance yield.展开更多
为研究异构多核片上系统(multi-processor system on chip,MPSoC)在密集并行计算任务中的潜力,文章设计并实现了一种适用于粗粒度数据特征、面向任务级并行应用的异构多核系统动态调度协处理器,采用了片上缓存、任务输出的多级写回管理...为研究异构多核片上系统(multi-processor system on chip,MPSoC)在密集并行计算任务中的潜力,文章设计并实现了一种适用于粗粒度数据特征、面向任务级并行应用的异构多核系统动态调度协处理器,采用了片上缓存、任务输出的多级写回管理、任务自动映射、通讯任务乱序执行等机制。实验结果表明,该动态调度协处理器不仅能够实现任务级乱序执行等基本设计目标,还具有极低的调度开销,相较于基于动态记分牌算法的调度器,运行多个子孔径距离压缩算法的时间降低达17.13%。研究结果证明文章设计的动态调度协处理器能够有效优化目标场景下的任务调度效果。展开更多
We demonstrate the direct loading of cold atoms into a microchip 2-mm Z-trap, where the evaporative cooling can be performed efficiently, from a macroscopic quadrupole magnetic trap with a high loading efficiency. The...We demonstrate the direct loading of cold atoms into a microchip 2-mm Z-trap, where the evaporative cooling can be performed efficiently, from a macroscopic quadrupole magnetic trap with a high loading efficiency. The macroscopic quadrupole magnetic trap potential is designed to be moveable by controlling the currents of the two pairs of anti-Helrnholtz coils. The cold atoms are initially prepared in a standard six-beam magneto-optical trap and loaded into the macroscopic quadrupole magnetic trap, and then transported to the atom chip surface by moving the macroscopic trap potential. By means of a three-dimensional absorption imaging system, we are able to optimize the position alignment of the atom cloud in the macroscopic trap and the microchip Z-shaped wire. Consequently, with a proper magnetic transfer scheme, we load the cold atoms into the microchip Z-trap directly and efficiently. The loading efficiency is measured to be about 50%. This approach can be used to generate appropriate ultracold atoms sources, for example, for a magnetically guided atom interferometer based on atom chip.展开更多
Hardware Trojans in integrated circuit chips have the characteristics of being covert,destructive,and difficult to protect,which have seriously endangered the security of the chips themselves and the information syste...Hardware Trojans in integrated circuit chips have the characteristics of being covert,destructive,and difficult to protect,which have seriously endangered the security of the chips themselves and the information systems to which they belong.Existing solutions generally rely on passive detection techniques.In this paper,a hardware Trojans active defense mechanism is designed for network switching chips based on the principle of encryption algorithm.By encoding the data entering the chip,the argot hidden in the data cannot trigger the hardware Trojans that may exist in the chip,so that the chip can work normally even if it is implanted with a hardware Trojans.The proposed method is proved to be effective in preventing hardware Trojans with different trigger characteristics by simulation tests and practical tests on our secure switching chip.展开更多
Networks-on-chip （NoC）, a new system on chip （SoC） paradigm, has become a great focus of research by many groups during the last few years. Among all the NoC architectures that have been proposed until now, 2D-Mes...Networks-on-chip （NoC）, a new system on chip （SoC） paradigm, has become a great focus of research by many groups during the last few years. Among all the NoC architectures that have been proposed until now, 2D-Mesh has proved to be the best architecture for implementation due to its regular and simple interconnection structure. In this paper, we propose a new interconnect architecture called 2D-diagonal mesh （2DDgl-Mesh） for on-chip communication. The 2DDglMesh is almost similar to traditional 2D-Mesh in aspects of cost, area, and implementation, but it can outperform the later in delay. The both architectures are compared by using NS-2 （a network simulator） and CINS1M （a component based interconnection simulator） under the same traffic models and parametric conditions. The results of comparison show that under the proposed architecture, the packets can almost always be routed to their destinations in less time. In addition, our archi- tecture can sometimes perform better than 2D-Mesh in drop ratio for special fixed traffic models.展开更多
基金supported by the National Key R&D Program of China(2024YFB4609801)the National Natural Science Foundation of China(52075289)the Tsinghua-Jiangyin Innovation Special Fund(TJISF,2023JYTH0104).
文摘Photonic computing has emerged as a promising technology for the ever-increasing computational demands of machine learning and artificial intelligence.Due to the advantages in computing speed,integrated photonic chips have attracted wide research attention on performing convolutional neural network algorithm.Programmable photonic chips are vital for achieving practical applications of photonic computing.Herein,a programmable photonic chip based on ultrafast laser-induced phase change is fabricated for photonic computing.Through designing the ultrafast laser pulses,the Sb film integrated into photonic waveguides can be reversibly switched between crystalline and amorphous phase,resulting in a large contrast in refractive index and extinction coefficient.As a consequence,the light transmission of waveguides can be switched between write and erase states.To determine the phase change time,the transient laser-induced phase change dynamics of Sb film are revealed at atomic scale,and the time-resolved transient reflectivity is measured.Based on the integrated photonic chip,photonic convolutional neural networks are built to implement machine learning algorithm,and images recognition task is achieved.This work paves a route for fabricating programmable photonic chips by designed ultrafast laser,which will facilitate the application of photonic computing in artificial intelligence.
基金Project supported by the National Natural Science Foundation of China(Grant No.12305303)the Natural Science Foundation of Hunan Province of China(Grant Nos.2023JJ40520,2021JJ40444,and 2019JJ30019)+3 种基金the Research Foundation of Education Bureau of Hunan Province of China(Grant No.20A430)the Science and Technology Innovation Program of Hunan Province(Grant No.2020RC3054)the Natural Science Basic Research Plan in the Shaanxi Province of China(Grant No.2023-JC-QN-0015)the Doctoral Research Fund of University of South China。
文摘Convolutional neural networks(CNNs) exhibit excellent performance in the areas of image recognition and object detection, which can enhance the intelligence level of spacecraft. However, in aerospace, energetic particles, such as heavy ions, protons, and alpha particles, can induce single event effects(SEEs) that lead CNNs to malfunction and can significantly impact the reliability of a CNN system. In this paper, the MNIST CNN system was constructed based on a 28 nm systemon-chip(SoC), and then an alpha particle irradiation experiment and fault injection were applied to evaluate the SEE of the CNN system. Various types of soft errors in the CNN system have been detected, and the SEE cross sections have been calculated. Furthermore, the mechanisms behind some soft errors have been explained. This research will provide technical support for the design of radiation-resistant artificial intelligence chips.
文摘The space-air-ground integrated network(SAGIN)combines the superiority of the satellite,aerial,and ground communications,which is envisioned to provide high-precision positioning ability as well as seamless connectivity in the 5G and Beyond 5G(B5G)systems.In this paper,we propose a three-dimensional SAGIN localization scheme for ground agents utilizing multi-source information from satellites,base stations and unmanned aerial vehicles(UAVs).Based on the designed scheme,we derive the positioning performance bound and establish a distributed maximum likelihood algorithm to jointly estimate the positions and clock offsets of ground agents.Simulation results demonstrate the validity of the SAGIN localization scheme and reveal the effects of the number of satellites,the number of base stations,the number of UAVs and clock noise on positioning performance.
文摘The Metropolitan Area Network (MAN) has faced serious problems after years of rapid development. The model of three-dimensional IP-based MAN, proposed by ZTE, is a next-generation MAN solution, which not only solves the existing problems but also brings new ideas for the development of next-generation MAN.
基金Project supported by the National Natural Science Foundation of China(Grant No.12305303)the Natural Science Foundation of Hunan Province of China(Grant Nos.2023JJ40520,2024JJ2044,and 2021JJ40444)+3 种基金the Science and Technology Innovation Program of Hunan Province,China(Grant No.2020RC3054)the Postgraduate Scientific Research Innovation Project of Hunan Province,China(Grant No.CX20240831)the Natural Science Basic Research Plan in the Shaanxi Province of China(Grant No.2023-JC-QN0015)the Doctoral Research Fund of University of South China(Grant No.200XQD033)。
文摘The single event effects(SEEs)evaluations caused by atmospheric neutrons were conducted on three different convolutional neural network(CNN)models(Yolov3,MNIST,and ResNet50)in the atmospheric neutron irradiation spectrometer(ANIS)at the China Spallation Neutron Source(CSNS).The Yolov3 and MNIST models were implemented on the XILINX28-nm system-on-chip(So C).Meanwhile,the Yolov3 and ResNet50 models were deployed on the XILINX 16-nm Fin FET Ultra Scale+MPSoC.The atmospheric neutron SEEs on the tested CNN systems were comprehensively evaluated from six aspects,including chip type,network architecture,deployment methods,inference time,datasets,and the position of the anchor boxes.The various types of SEE soft errors,SEE cross-sections,and their distribution were analyzed to explore the radiation sensitivities and rules of 28-nm and 16-nm SoC.The current research can provide the technology support of radiation-resistant design of CNN system for developing and applying high-reliability,long-lifespan domestic artificial intelligence chips.
基金Supported by the Natural Science Foundation of China(61076019)the China Postdoctoral Science Foundation(20100481134)+1 种基金the Natural Science Foundation of Jiangsu Province(BK2008387)the Graduate Student Innovation Foundation of Jiangsu Province(CX07B-105z)~~
文摘The network on chip（NoC）is used as a solution for the communication problems in a complex system on chip（SoC）design.To further enhance performances,the NoC architectures,a high level modeling and an evaluation method based on OPNET are proposed to analyze their performances on different injection rates and traffic patterns.Simulation results for general NoC in terms of the average latency and the throughput are analyzed and used as a guideline to make appropriate choices for a given application.Finally,a MPEG4 decoder is mapped on different NoC architectures.Results prove the effectiveness of the evaluation method.
基金National Natural Science Foundation of China(No.51974209)the Natural Science Foundation of Hubei Province of China(Nos.2013CFA021,2017CFB401,2018CFA022)。
文摘Several challenging issues,such as the poor conductivity of sulfur,shuttle effects,large volume change of cathode,and the dendritic lithium in anode,have led to the low utilization of sulfur and hampered the commercialization of lithium–sulfur batteries.In this study,a novel three-dimensionally interconnected network structure comprising Co9 S8 and multiwalled carbon nanotubes(MWCNTs)was synthesized by a solvothermal route and used as the sulfur host.The assembled batteries delivered a specific capacity of1154 m Ah g-1 at 0.1 C,and the retention was 64%after 400 cycles at 0.5 C.The polar and catalytic Co9 S8 nanoparticles have a strong adsorbent effect for polysulfide,which can effectively reduce the shuttling effect.Meanwhile,the three-dimensionally interconnected CNT networks improve the overall conductivity and increase the contact with the electrolyte,thus enhancing the transport of electrons and Li ions.Polysulfide adsorption is greatly increased with the synergistic effect of polar Co9 S8 and MWCNTs in the three-dimensionally interconnected composites,which contributes to their promising performance for the lithium–sulfur batteries.
基金supports from the National Key Research and Development Program of China (Nos.2021YFB2801900,2021YFB2801901,2021YFB2801902,2021YFB2801903,2021YFB2801904)the National Outstanding Youth Science Fund Project of National Natural Science Foundation of China (No.62022062)+1 种基金the National Natural Science Foundation of China (No.61974177)the Fundamental Research Funds for the Central Universities (No.QTZX23041).
文摘Spiking neural networks(SNNs)utilize brain-like spatiotemporal spike encoding for simulating brain functions.Photonic SNN offers an ultrahigh speed and power efficiency platform for implementing high-performance neuromorphic computing.Here,we proposed a multi-synaptic photonic SNN,combining the modified remote supervised learning with delayweight co-training to achieve pattern classification.The impact of multi-synaptic connections and the robustness of the network were investigated through numerical simulations.In addition,the collaborative computing of algorithm and hardware was demonstrated based on a fabricated integrated distributed feedback laser with a saturable absorber(DFB-SA),where 10 different noisy digital patterns were successfully classified.A functional photonic SNN that far exceeds the scale limit of hardware integration was achieved based on time-division multiplexing,demonstrating the capability of hardware-algorithm co-computation.
基金supported in part by the National Nat-ural Science Foundation of China(Grant Nos.61401082,61471109,61502075,61672123,91438110,U1301253)the Fundamental Research Funds for Central Universities(Grant Nos.N161604004,N161608001,N150401002,DUT15RC(3)009)Liaoning Bai Qian Wan Talents Program,and National High-Level Personnel Special Support Program for Youth Top-Notch Talent
文摘As a nanometer-level interconnection,the Optical Network-on-Chip(ONoC)was proposed since it was typically characterized by low latency,high bandwidth and power efficiency. Compared with a 2-Dimensional(2D)design,the 3D integration has the higher packing density and the shorter wire length. Therefore,the 3D ONoC will have the great potential in the future. In this paper,we first discuss the existing ONoC researches,and then design mesh and torus ONoCs from the perspectives of topology,router,and routing module,with the help of 3D integration. A simulation platform is established by using OPNET to compare the performance of 2D and 3D ONoCs in terms of average delay and packet loss rate. The performance comparison between 3D mesh and 3D torus ONoCs is also conducted. The simulation results demonstrate that 3D integration has the advantage of reducing average delay and packet loss rate,and 3D torus ONoC has the better performance compared with 3D mesh solution. Finally,we summarize some future challenges with possible solutions,including microcosmic routing inside optical routers and highly-efficient traffic grooming.
基金supported by the National Natural Science Foundation of China under Grant No.61376024 and No.61306024Natural Science Foundation of Guangdong Province under Grant No.S2013040014366Basic Research Programme of Shenzhen No.JCYJ20140417113430642 and JCYJ20140901003939020
文摘Modulating both the clock frequency and supply voltage of the network-on-chip （NoC） during runtime can reduce the power consumption and heat flux, but will lead to the increase of the latency of NoC. It is necessary to find a tradeoff between power consumption and communication latency. So we propose an analytical latency model which can show us the relationship of them. The proposed model to analyze latency is based on the M/G/1 queuing model, which is suitable for dynamic frequency scaling. The experiment results show that the accuracy of this model is more than 90%.
基金supported by the National Basic Research Program of China(Grant No.2013CB837200)the National Natural Science Foundation of China(Grant No.11474345)the Beijing Natural Science Foundation,China(Grant No.7154221)
文摘Metastasis is the leading cause of most cancer deaths, as opposed to dysregulated cell growth of the primary tumor. Molecular mechanisms of metastasis have been studied for decades and the findings have evolved our understanding of the progression of malignancy. However, most of the molecular mechanisms fail to address the causes of cancer and its evolutionary origin, demonstrating an inability to find a solution for complete cure of cancer. After being a neglected area of tumor biology for quite some time, recently several studies have focused on the impact of the tumor microenvironment on cancer growth. The importance of the tumor microenvironment is gradually gaining attention, particularly from the per- spective of biophysics. In vitro three-dimensional （3-D） metastatic models are an indispensable platform for investigating the tumor microenvironment, as they mimic the in vivo tumor tissue. In 3-D metastatic in vitro models, static factors such as the mechanical properties, biochemical factors, as well as dynamic factors such as cell-cell, cell-ECM interactions, and fluid shear stress can be studied quantitatively. With increasing focus on basic cancer research and drug development, the in vitro 3-D models offer unique advantages in fundamental and clinical biomedical studies.
基金supported by the National Natural Science Foundation of China(NSFC)(62125503,62261160388)the Natural Science Foundation of Hubei Province of China(2023AFA028)the Innovation Project of Optics Valley Laboratory(OVL2021BG004).
文摘In recent years,space-division multiplexing(SDM)technology,which involves transmitting data information on multiple parallel channels for efficient capacity scaling,has been widely used in fiber and free-space optical communication sys-tems.To enable flexible data management and cope with the mixing between different channels,the integrated reconfig-urable optical processor is used for optical switching and mitigating the channel crosstalk.However,efficient online train-ing becomes intricate and challenging,particularly when dealing with a significant number of channels.Here we use the stochastic parallel gradient descent(SPGD)algorithm to configure the integrated optical processor,which has less com-putation than the traditional gradient descent(GD)algorithm.We design and fabricate a 6×6 on-chip optical processor on silicon platform to implement optical switching and descrambling assisted by the online training with the SPDG algorithm.Moreover,we apply the on-chip processor configured by the SPGD algorithm to optical communications for optical switching and efficiently mitigating the channel crosstalk in SDM systems.In comparison with the traditional GD al-gorithm,it is found that the SPGD algorithm features better performance especially when the scale of matrix is large,which means it has the potential to optimize large-scale optical matrix computation acceleration chips.
基金supported by the National Natural Science Foundation of China under Grant No.61376024 and No.61306024the Natural Science Foundation of Guangdong Province under Grant No.S2013040014366Basic Research Program of Shenzhen No.JCYJ20140417113430642 and JCYJ20140901003939020
文摘The networks-on-chip （NoC） communication has an increasingly larger impact on the system power consumption and performance. Emerging technologies, like surface wave, are believed to have lower transmission latency and power consumption over the conventional wireless NoC. Therefore, this paper studies how to optimize the network performance and power consumption by giving the packet-switching fabric and traffic pattern of each application. Compared with the conventional method of wire-linked, which adds wireless transceivers by using the genetic algorithm （GA）, the proposed maximal declining sorting algorithm （MDSA） can effectively reduce time consumption by as much as 20.4% to 35.6%. We also evaluate the power consumption and configuration time to prove the effective of the proposed algorithm.
文摘A variation-aware task mapping approach is proposed for a multi-core network-on-chips with redundant cores, which includes both the design-time mapping and run-time scheduling algorithms. Firstly, a design-time genetic task mapping algorithm is proposed during the design stage to generate multiple task mapping solutions which cover a maximum range of chips. Then, during the run, one optimal task mapping solution is selected. Additionally, logical cores are mapped to physically available cores. Both core asymmetry and topological changes are considered in the proposed approach. Experimental results show that the performance yield of the proposed approach is 96% on average, and the communication cost, power consumption and peak temperature are all optimized without loss of performance yield.
文摘为研究异构多核片上系统(multi-processor system on chip,MPSoC)在密集并行计算任务中的潜力,文章设计并实现了一种适用于粗粒度数据特征、面向任务级并行应用的异构多核系统动态调度协处理器,采用了片上缓存、任务输出的多级写回管理、任务自动映射、通讯任务乱序执行等机制。实验结果表明,该动态调度协处理器不仅能够实现任务级乱序执行等基本设计目标,还具有极低的调度开销,相较于基于动态记分牌算法的调度器,运行多个子孔径距离压缩算法的时间降低达17.13%。研究结果证明文章设计的动态调度协处理器能够有效优化目标场景下的任务调度效果。
基金Project supported by the National Natural Science Foundation of China(Grant No.11604348)
文摘We demonstrate the direct loading of cold atoms into a microchip 2-mm Z-trap, where the evaporative cooling can be performed efficiently, from a macroscopic quadrupole magnetic trap with a high loading efficiency. The macroscopic quadrupole magnetic trap potential is designed to be moveable by controlling the currents of the two pairs of anti-Helrnholtz coils. The cold atoms are initially prepared in a standard six-beam magneto-optical trap and loaded into the macroscopic quadrupole magnetic trap, and then transported to the atom chip surface by moving the macroscopic trap potential. By means of a three-dimensional absorption imaging system, we are able to optimize the position alignment of the atom cloud in the macroscopic trap and the microchip Z-shaped wire. Consequently, with a proper magnetic transfer scheme, we load the cold atoms into the microchip Z-trap directly and efficiently. The loading efficiency is measured to be about 50%. This approach can be used to generate appropriate ultracold atoms sources, for example, for a magnetically guided atom interferometer based on atom chip.
文摘Hardware Trojans in integrated circuit chips have the characteristics of being covert,destructive,and difficult to protect,which have seriously endangered the security of the chips themselves and the information systems to which they belong.Existing solutions generally rely on passive detection techniques.In this paper,a hardware Trojans active defense mechanism is designed for network switching chips based on the principle of encryption algorithm.By encoding the data entering the chip,the argot hidden in the data cannot trigger the hardware Trojans that may exist in the chip,so that the chip can work normally even if it is implanted with a hardware Trojans.The proposed method is proved to be effective in preventing hardware Trojans with different trigger characteristics by simulation tests and practical tests on our secure switching chip.
基金supported by the National Natural Science Foundation of China under Grant No.60425413
文摘Networks-on-chip （NoC）, a new system on chip （SoC） paradigm, has become a great focus of research by many groups during the last few years. Among all the NoC architectures that have been proposed until now, 2D-Mesh has proved to be the best architecture for implementation due to its regular and simple interconnection structure. In this paper, we propose a new interconnect architecture called 2D-diagonal mesh （2DDgl-Mesh） for on-chip communication. The 2DDglMesh is almost similar to traditional 2D-Mesh in aspects of cost, area, and implementation, but it can outperform the later in delay. The both architectures are compared by using NS-2 （a network simulator） and CINS1M （a component based interconnection simulator） under the same traffic models and parametric conditions. The results of comparison show that under the proposed architecture, the packets can almost always be routed to their destinations in less time. In addition, our archi- tecture can sometimes perform better than 2D-Mesh in drop ratio for special fixed traffic models.
