A 32 kbit OTP(one-time programmable)memory for MCUs(micro-controller units)used in remote controllers was designed.This OTP memory is used for program and data storage.It is required to apply 5.5V to BL(bit-line)and 1...A 32 kbit OTP(one-time programmable)memory for MCUs(micro-controller units)used in remote controllers was designed.This OTP memory is used for program and data storage.It is required to apply 5.5V to BL(bit-line)and 11V to WL(word-line)for a OTP cell of 0.35μm ETOX(EEPROM tunnel oxide)type by MagnaChip.We use 5V transistors on column data paths to reduce the area of column data paths since they require small areas.In addition,we secure device reliability by using HV(high-voltage)transistors in the WL driver.Furthermore,we change from a static logic to a dynamic logic used for the WL driver in the core circuit.Also,we optimize the WD(write data)switch circuit.Thus,we can implement them with a small-area design.In addition,we implement the address predecoder with a small-area logic circuit.The area of the designed 32 kbit OTP with 5V and HV devices is 674.725μm×258.75μm(=0.1745mm2)and is 56.3% smaller than that using 3.3V devices.展开更多
A 1 kbit antifuse one time programmable(OTP) memory IP,which is one of the non-volatile memory IPs,was designed and used for power management integrated circuits(ICs).A conventional antifuse OTP cell using a single po...A 1 kbit antifuse one time programmable(OTP) memory IP,which is one of the non-volatile memory IPs,was designed and used for power management integrated circuits(ICs).A conventional antifuse OTP cell using a single positive program voltage(VPP) has a problem when applying a higher voltage than the breakdown voltage of the thin gate oxides and at the same time,securing the reliability of medium voltage(VM) devices that are thick gate transistors.A new antifuse OTP cell using a dual program voltage was proposed to prevent the possibility for failures in a qualification test or the yield drop.For the newly proposed cell,a stable sensing is secured from the post-program resistances of several ten thousand ohms or below due to the voltage higher than the hard breakdown voltage applied to the terminals of the antifuse.The layout size of the designed 1 kbit antifuse OTP memory IP with Dongbu HiTek's 0.18 μm Bipolar-CMOS-DMOS(BCD) process is 567.9 μm×205.135 μm and the post-program resistance of an antifuse is predicted to be several ten thousand ohms.展开更多
基金Project supported by the Second Stage of Brain Korea 21 Projects,Korea
文摘A 32 kbit OTP(one-time programmable)memory for MCUs(micro-controller units)used in remote controllers was designed.This OTP memory is used for program and data storage.It is required to apply 5.5V to BL(bit-line)and 11V to WL(word-line)for a OTP cell of 0.35μm ETOX(EEPROM tunnel oxide)type by MagnaChip.We use 5V transistors on column data paths to reduce the area of column data paths since they require small areas.In addition,we secure device reliability by using HV(high-voltage)transistors in the WL driver.Furthermore,we change from a static logic to a dynamic logic used for the WL driver in the core circuit.Also,we optimize the WD(write data)switch circuit.Thus,we can implement them with a small-area design.In addition,we implement the address predecoder with a small-area logic circuit.The area of the designed 32 kbit OTP with 5V and HV devices is 674.725μm×258.75μm(=0.1745mm2)and is 56.3% smaller than that using 3.3V devices.
基金Work supported by the Second Stage of Brain Korea 21 Projectssupported by Changwon National University in 2009-2010
文摘A 1 kbit antifuse one time programmable(OTP) memory IP,which is one of the non-volatile memory IPs,was designed and used for power management integrated circuits(ICs).A conventional antifuse OTP cell using a single positive program voltage(VPP) has a problem when applying a higher voltage than the breakdown voltage of the thin gate oxides and at the same time,securing the reliability of medium voltage(VM) devices that are thick gate transistors.A new antifuse OTP cell using a dual program voltage was proposed to prevent the possibility for failures in a qualification test or the yield drop.For the newly proposed cell,a stable sensing is secured from the post-program resistances of several ten thousand ohms or below due to the voltage higher than the hard breakdown voltage applied to the terminals of the antifuse.The layout size of the designed 1 kbit antifuse OTP memory IP with Dongbu HiTek's 0.18 μm Bipolar-CMOS-DMOS(BCD) process is 567.9 μm×205.135 μm and the post-program resistance of an antifuse is predicted to be several ten thousand ohms.
