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Design and implementation of 1 GHz high speed data acquisition system 被引量:3
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作者 Zou Lin Wang Xuegang Qian Lu 《Journal of Systems Engineering and Electronics》 SCIE EI CSCD 2009年第1期55-59,共5页
With the development of current electronic technology, numerous high-speed data acquisition systems provide a variety of potential benefits. This article describes a high-speed data acquisition system which consists o... With the development of current electronic technology, numerous high-speed data acquisition systems provide a variety of potential benefits. This article describes a high-speed data acquisition system which consists of ECL logic and TTL logic devices, samples and stores data with a 1 GHz clock. This system is accomplished easily and works stably. A performance test of this system has been undertaken and the results show that the effective number of bits (ENOB) is more than 6.5 bits. 展开更多
关键词 A/D converter high-speed data acquisition system effective number of bits.
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