Aim To present an ASIC design of DA based 2 D IDCT. Methods\ In the design of 1 D IDCT is utilized a Chen based fast IDCT algorithm, and multiplier accumulators based on distributed algorithm contributes in reduc...Aim To present an ASIC design of DA based 2 D IDCT. Methods\ In the design of 1 D IDCT is utilized a Chen based fast IDCT algorithm, and multiplier accumulators based on distributed algorithm contributes in reducing the hardware amount and in enhancing the speed performance. Results and Conclusion\ VHDL simulation, synthesis and layout design of system are implemented. This 2 D IDCT ASIC design owns best timing performance when compared with other better designs internationally. Results of design prove to be excellent.展开更多
This paper presents an analysis on and experimental comparison of several typical fast algorithms for discrete wavelet transform (DWT) and their implementation in image compression, particularly the Mallat algorithm, ...This paper presents an analysis on and experimental comparison of several typical fast algorithms for discrete wavelet transform (DWT) and their implementation in image compression, particularly the Mallat algorithm, FFT-based algorithm, Short- length based algorithm and Lifting algorithm. The principles, structures and computational complexity of these algorithms are explored in details respectively. The results of the experiments for comparison are consistent to those simulated by MATLAB. It is found that there are limitations in the implementation of DWT. Some algorithms are workable only for special wavelet transform, lacking in generality. Above all, the speed of wavelet transform, as the governing element to the speed of image processing, is in fact the retarding factor for real-time image processing.展开更多
文摘Aim To present an ASIC design of DA based 2 D IDCT. Methods\ In the design of 1 D IDCT is utilized a Chen based fast IDCT algorithm, and multiplier accumulators based on distributed algorithm contributes in reducing the hardware amount and in enhancing the speed performance. Results and Conclusion\ VHDL simulation, synthesis and layout design of system are implemented. This 2 D IDCT ASIC design owns best timing performance when compared with other better designs internationally. Results of design prove to be excellent.
基金the Natural Science Foundation of China (No.60472037).
文摘This paper presents an analysis on and experimental comparison of several typical fast algorithms for discrete wavelet transform (DWT) and their implementation in image compression, particularly the Mallat algorithm, FFT-based algorithm, Short- length based algorithm and Lifting algorithm. The principles, structures and computational complexity of these algorithms are explored in details respectively. The results of the experiments for comparison are consistent to those simulated by MATLAB. It is found that there are limitations in the implementation of DWT. Some algorithms are workable only for special wavelet transform, lacking in generality. Above all, the speed of wavelet transform, as the governing element to the speed of image processing, is in fact the retarding factor for real-time image processing.
