An optimized silicon carbide(SiC)trench metal-oxide-semiconductor field-effect transistor(MOSFET)structure with side-wall p-type pillar(p-pillar)and wrap n-type pillar(n-pillar)in the n-drain was investigated by utili...An optimized silicon carbide(SiC)trench metal-oxide-semiconductor field-effect transistor(MOSFET)structure with side-wall p-type pillar(p-pillar)and wrap n-type pillar(n-pillar)in the n-drain was investigated by utilizing Silvaco TCAD simulations.The optimized structure mainly includes a p+buried region,a light n-type current spreading layer(CSL),a p-type pillar region,and a wrapping n-type pillar region at the right and bottom of the p-pillar.The improved structure is named as SNPPT-MOS.The side-wall p-pillar region could better relieve the high electric field around the p+shielding region and the gate oxide in the off-state mode.The wrapping n-pillar region and CSL can also effectively reduce the specific on-resistance(Ron,sp).As a result,the SNPPT-MOS structure exhibits that the figure of merit(Fo M)related to the breakdown voltage(V_(BR))and Ron,sp(V_(BR)^2R_(on,sp))of the SNPPT-MOS is improved by 44.5%,in comparison to that of the conventional trench gate SJ MOSFET(full-SJ-MOS).In addition,the SNPPT-MOS structure achieves a much fasterwitching speed than the full-SJ-MOS,and the result indicates an appreciable reduction in the switching energy loss.展开更多
The key parameters of vertical AlN Schottky barrier diodes(SBDs) with variable drift layer thickness(DLT) and drift layer concentration(DLC) are investigated. The specific on-resistance(R_(on,sp)) decreased to 0.5 mΩ...The key parameters of vertical AlN Schottky barrier diodes(SBDs) with variable drift layer thickness(DLT) and drift layer concentration(DLC) are investigated. The specific on-resistance(R_(on,sp)) decreased to 0.5 mΩ · cm^(2) and the breakdown voltage(V_(BR)) decreased from 3.4 kV to 1.1 kV by changing the DLC from 10^(15) cm^(-3) to 3×10^(16) cm^(-3). The VBRincreases from 1.5 kV to 3.4 kV and the Ron,sp also increases to 12.64 mΩ · cm^(2) by increasing DLT from 4-μm to 11-μm. The VBRenhancement results from the increase of depletion region extension. The Baliga's figure of merit(BFOM) of3.8 GW/cm^(2) was obtained in the structure of 11-μm DLT and 10^(16) cm^(-3) DLC without FP. When DLT or DLC is variable,the consideration of the value of BFOM is essential. In this paper, we also present the vertical AlN SBD with a field plate(FP), which decreases the crowding of electric field in electrode edge. All the key parameters were optimized by simulating based on Silvaco-ATLAS.展开更多
基金the National Natural Science Foundation of China(Grant Nos.61774052 and 61904045)the National Natural Science Foundation of Jiangxi Province of China(Grant No.20202BABL201021)the Education Department of Jiangxi Province of China for Youth Foundation(Grant No.GJJ191154)。
文摘An optimized silicon carbide(SiC)trench metal-oxide-semiconductor field-effect transistor(MOSFET)structure with side-wall p-type pillar(p-pillar)and wrap n-type pillar(n-pillar)in the n-drain was investigated by utilizing Silvaco TCAD simulations.The optimized structure mainly includes a p+buried region,a light n-type current spreading layer(CSL),a p-type pillar region,and a wrapping n-type pillar region at the right and bottom of the p-pillar.The improved structure is named as SNPPT-MOS.The side-wall p-pillar region could better relieve the high electric field around the p+shielding region and the gate oxide in the off-state mode.The wrapping n-pillar region and CSL can also effectively reduce the specific on-resistance(Ron,sp).As a result,the SNPPT-MOS structure exhibits that the figure of merit(Fo M)related to the breakdown voltage(V_(BR))and Ron,sp(V_(BR)^2R_(on,sp))of the SNPPT-MOS is improved by 44.5%,in comparison to that of the conventional trench gate SJ MOSFET(full-SJ-MOS).In addition,the SNPPT-MOS structure achieves a much fasterwitching speed than the full-SJ-MOS,and the result indicates an appreciable reduction in the switching energy loss.
基金supported by Key-Area Research and Development Program of Guangdong Province,China (Grant Nos. 2020B010174001 and 2020B010171002)Ningbo Science and Technology Innovation 2025 (Grant No. 2019B10123)。
文摘The key parameters of vertical AlN Schottky barrier diodes(SBDs) with variable drift layer thickness(DLT) and drift layer concentration(DLC) are investigated. The specific on-resistance(R_(on,sp)) decreased to 0.5 mΩ · cm^(2) and the breakdown voltage(V_(BR)) decreased from 3.4 kV to 1.1 kV by changing the DLC from 10^(15) cm^(-3) to 3×10^(16) cm^(-3). The VBRincreases from 1.5 kV to 3.4 kV and the Ron,sp also increases to 12.64 mΩ · cm^(2) by increasing DLT from 4-μm to 11-μm. The VBRenhancement results from the increase of depletion region extension. The Baliga's figure of merit(BFOM) of3.8 GW/cm^(2) was obtained in the structure of 11-μm DLT and 10^(16) cm^(-3) DLC without FP. When DLT or DLC is variable,the consideration of the value of BFOM is essential. In this paper, we also present the vertical AlN SBD with a field plate(FP), which decreases the crowding of electric field in electrode edge. All the key parameters were optimized by simulating based on Silvaco-ATLAS.
