The direct current-direct current （DC-DC） converter is designed for 1 T static random access memory （SRAM） used in display driver integrated circuits （ICs）, which consists of positive word-line voltage （VpwL）,...The direct current-direct current （DC-DC） converter is designed for 1 T static random access memory （SRAM） used in display driver integrated circuits （ICs）, which consists of positive word-line voltage （VpwL）, negative word-line voltage （VinyL） and half-VDD voltage （VHDo） generator. To generate a process voltage temperature （PVT）-insensitive VpWL and VNWL, a set of circuits were proposed to generate reference voltages using bandgap reference current generators for respective voltage level detectors. Also, a VOWL regulator and a VNWL charge pump were proposed for a small-area and low-power design. The proposed VpwL regulator can provide a large driving current with a small area since it regulates an input voltage （VCI） from 2.5 to 3.3 V. The VmvL charge pump can be implemented as a high-efficiency circuit with a small area and low power since it can transfer pumped charges to VNWL node entirely. The DC-DC converter for 1 T SRAM were designed with 0.11 μm mixed signal process and operated well with satisfactory measurement results.展开更多
为了研究阻尼绕组和磁场饱和对汽轮发电机小扰动特性及静态稳定性的影响,分别采用经典派克(Park)方程模型与时步有限元(time-stepping finite element method,T-SFEM)模型,对发电机不同工况下发生的小扰动进行仿真计算。在此基础上,结...为了研究阻尼绕组和磁场饱和对汽轮发电机小扰动特性及静态稳定性的影响,分别采用经典派克(Park)方程模型与时步有限元(time-stepping finite element method,T-SFEM)模型,对发电机不同工况下发生的小扰动进行仿真计算。在此基础上,结合小信号分析法与普罗尼(Prony)方法,对比分析了不同模型下发电机小扰动过程的动态特性以及系统静态稳定性等相关问题。结果表明,在不考虑阻尼绕组与磁场饱和的情况下,2种模型所得的小扰动特性基本一致,而当计及阻尼绕组或磁场饱和作用时则差别显著;采用派克方程模型计算所得的静态稳定极限功角比时步有限元模型的计算结果偏大。研究结果为系统仿真分析提供了合理参考。展开更多
基金supported by the Second Stage of Brain Korea 21 Projectsfinancially supported by Changwon National University in 2011-2013
文摘The direct current-direct current （DC-DC） converter is designed for 1 T static random access memory （SRAM） used in display driver integrated circuits （ICs）, which consists of positive word-line voltage （VpwL）, negative word-line voltage （VinyL） and half-VDD voltage （VHDo） generator. To generate a process voltage temperature （PVT）-insensitive VpWL and VNWL, a set of circuits were proposed to generate reference voltages using bandgap reference current generators for respective voltage level detectors. Also, a VOWL regulator and a VNWL charge pump were proposed for a small-area and low-power design. The proposed VpwL regulator can provide a large driving current with a small area since it regulates an input voltage （VCI） from 2.5 to 3.3 V. The VmvL charge pump can be implemented as a high-efficiency circuit with a small area and low power since it can transfer pumped charges to VNWL node entirely. The DC-DC converter for 1 T SRAM were designed with 0.11 μm mixed signal process and operated well with satisfactory measurement results.
文摘为了研究阻尼绕组和磁场饱和对汽轮发电机小扰动特性及静态稳定性的影响,分别采用经典派克(Park)方程模型与时步有限元(time-stepping finite element method,T-SFEM)模型,对发电机不同工况下发生的小扰动进行仿真计算。在此基础上,结合小信号分析法与普罗尼(Prony)方法,对比分析了不同模型下发电机小扰动过程的动态特性以及系统静态稳定性等相关问题。结果表明,在不考虑阻尼绕组与磁场饱和的情况下,2种模型所得的小扰动特性基本一致,而当计及阻尼绕组或磁场饱和作用时则差别显著;采用派克方程模型计算所得的静态稳定极限功角比时步有限元模型的计算结果偏大。研究结果为系统仿真分析提供了合理参考。
