An analytical model for current-voltage behavior of amorphous In-Ga-Zn-O thin-film transistors（a-IGZO TFTs）with dual-gate structures is developed.The unified expressions for synchronous and asynchronous operating mo...An analytical model for current-voltage behavior of amorphous In-Ga-Zn-O thin-film transistors（a-IGZO TFTs）with dual-gate structures is developed.The unified expressions for synchronous and asynchronous operating modes are derived on the basis of channel charges,which are controlled by gate voltage.It is proven that the threshold voltage of asynchronous dual-gate IGZO TFTs is adjusted in proportion to the ratio of top insulating capacitance to the bottom insulating capacitance（C_（TI）/C_（BI））.Incorporating the proposed model with Verilog-A,a touch-sensing circuit using dual-gate structure is investigated by SPICE simulations.Comparison shows that the touch sensitivity is increased by the dual-gate IGZO TFT structure.展开更多
The energy bandgap is an intrinsic character of semiconductors, which largely determines their properties. The ability to continuously and reversibly tune the bandgap of a single device during real time operation is o...The energy bandgap is an intrinsic character of semiconductors, which largely determines their properties. The ability to continuously and reversibly tune the bandgap of a single device during real time operation is of great importance not only to device physics but also to technological applications. Here we demonstrate a widely tunable bandgap of few-layer black phosphorus （BP） by the application of vertical electric field in dual-gated BP field-effect transistors. A total bandgap reduction of 124 meV is observed when the electrical displacement field is increased from 0.10 V/nm to 0.83 V/nm. Our results suggest appealing potential for few-layer BP as a tunable bandgap material in infrared optoelectronies, thermoelectric power generation and thermal imaging.展开更多
在TFT-LCD驱动的关键设计技术中,抖动算法FRC(frame rate control)是一种重要的技术。它能够用6 bit source的输出来达到8 bit full color(16.7 M colors)的显示效果,这样可以降低数据传输率以降低功耗,同时可以节省源驱动(Source Drive...在TFT-LCD驱动的关键设计技术中,抖动算法FRC(frame rate control)是一种重要的技术。它能够用6 bit source的输出来达到8 bit full color(16.7 M colors)的显示效果,这样可以降低数据传输率以降低功耗,同时可以节省源驱动(Source Driver,SD)芯片的面积。通过分析和实践,提出了针对用于平板电脑的Dual-Gate TFT-LCD屏和翻转方式,需要采用优化的FRC算法提高显示效果。在应用于平板电脑的dual-gate TFT-LCD屏的FRC方案中,分析了传统方案产生周期性竖线的原因,然后提出了改进方案,消除了竖线,提高了显示质量。最后,总结了FRC算法具体需要考虑的因素。展开更多
An analytical drain current model on the basis of the surface potential is proposed for indium-gallium zinc oxide(InGaZnO)thin-film transistors(TFTs)with an independent dual-gate(IDG)structure.For a unified expression...An analytical drain current model on the basis of the surface potential is proposed for indium-gallium zinc oxide(InGaZnO)thin-film transistors(TFTs)with an independent dual-gate(IDG)structure.For a unified expression of carriers’distribution for the sub-threshold region and the conduction region,the concept of equivalent flat-band voltage and the Lambert W function are introduced to solve the Poisson equation,and to derive the potential distribution of the active layer.In addition,the regional integration approach is used to develop a compact analytical current-voltage model.Although only two fitting parameters are required,a good agreement is obtained between the calculated results by the proposed model and the simulation results by TCAD.The proposed current-voltage model is then implemented by using Verilog-A for SPICE simulations of a dual-gate InGaZnO TFT integrated inverter circuit.展开更多
A new high voltage trench lateral double-diffused metal–oxide semiconductor （LDMOS） with ultra-low specific onresistance （R on,sp ） is proposed. The structure features a dual gate （DG LDMOS）： a planar gate and...A new high voltage trench lateral double-diffused metal–oxide semiconductor （LDMOS） with ultra-low specific onresistance （R on,sp ） is proposed. The structure features a dual gate （DG LDMOS）： a planar gate and a trench gate inset in the oxide trench. Firstly, the dual gate can provide a dual conduction channel and reduce R on,sp dramatically. Secondly, the oxide trench in the drift region modulates the electric field distribution and reduces the cell pitch but still can maintain comparable breakdown voltage （BV）. Simulation results show that the cell pitch of the DG LDMOS can be reduced by 50% in comparison with that of conventional LDMOS at the equivalent BV; furthermore, R on,sp of the DG LDMOS can be reduced by 67% due to the smaller cell pitch and the dual gate.展开更多
针对神经网络提取的信号特征不足导致信号识别率下降的问题,提出基于门控注意力网络的调制信号分类识别算法。该算法先对输入信号进行混合数据增强,生成更多维度的样本以便网络更好地提取信号特征;再将处理后的样本信号输入双通道网络(C...针对神经网络提取的信号特征不足导致信号识别率下降的问题,提出基于门控注意力网络的调制信号分类识别算法。该算法先对输入信号进行混合数据增强,生成更多维度的样本以便网络更好地提取信号特征;再将处理后的样本信号输入双通道网络(CNN and BiLSTM Parallel),并行提取信号的空间特征和时间特征;最后将提取到的特征输入到门控注意力网络中,自适应地调整特征权重,减少网络复杂度。实验表明,文中提出的算法最高分类准确率为92.3%,优于对比的其他网络模型。展开更多
基金Supported by the National Key Research and Development Program of China under Grant No 2017YFA0204600the National Natural Science Foundation of China under Grant No 61404002the Science and Technology Project of Hunan Province under Grant No 2015JC3041
文摘An analytical model for current-voltage behavior of amorphous In-Ga-Zn-O thin-film transistors（a-IGZO TFTs）with dual-gate structures is developed.The unified expressions for synchronous and asynchronous operating modes are derived on the basis of channel charges,which are controlled by gate voltage.It is proven that the threshold voltage of asynchronous dual-gate IGZO TFTs is adjusted in proportion to the ratio of top insulating capacitance to the bottom insulating capacitance（C_（TI）/C_（BI））.Incorporating the proposed model with Verilog-A,a touch-sensing circuit using dual-gate structure is investigated by SPICE simulations.Comparison shows that the touch sensitivity is increased by the dual-gate IGZO TFT structure.
基金Supported by the National Basic Research Program of China under Grant Nos 2013CB921900 and 2014CB920900the National Natural Science Foundation of China under Grant No 11374021)(S.Yan,Z.Xie,J.-H,Chen)+1 种基金support from the Elemental Strategy Initiative conducted by the MEXT,Japana Grant-in-Aid for Scientific Research on Innovative Areas"Science of Atomic Layers"from JSPS
文摘The energy bandgap is an intrinsic character of semiconductors, which largely determines their properties. The ability to continuously and reversibly tune the bandgap of a single device during real time operation is of great importance not only to device physics but also to technological applications. Here we demonstrate a widely tunable bandgap of few-layer black phosphorus （BP） by the application of vertical electric field in dual-gated BP field-effect transistors. A total bandgap reduction of 124 meV is observed when the electrical displacement field is increased from 0.10 V/nm to 0.83 V/nm. Our results suggest appealing potential for few-layer BP as a tunable bandgap material in infrared optoelectronies, thermoelectric power generation and thermal imaging.
文摘在TFT-LCD驱动的关键设计技术中,抖动算法FRC(frame rate control)是一种重要的技术。它能够用6 bit source的输出来达到8 bit full color(16.7 M colors)的显示效果,这样可以降低数据传输率以降低功耗,同时可以节省源驱动(Source Driver,SD)芯片的面积。通过分析和实践,提出了针对用于平板电脑的Dual-Gate TFT-LCD屏和翻转方式,需要采用优化的FRC算法提高显示效果。在应用于平板电脑的dual-gate TFT-LCD屏的FRC方案中,分析了传统方案产生周期性竖线的原因,然后提出了改进方案,消除了竖线,提高了显示质量。最后,总结了FRC算法具体需要考虑的因素。
基金Project supported by the National Key Research and Development Program of China(Grant No.2017YFA0204600)the Fundamental Research Funds for the Central Universities of Central South University,China(Grant No.2019zzts424)。
文摘An analytical drain current model on the basis of the surface potential is proposed for indium-gallium zinc oxide(InGaZnO)thin-film transistors(TFTs)with an independent dual-gate(IDG)structure.For a unified expression of carriers’distribution for the sub-threshold region and the conduction region,the concept of equivalent flat-band voltage and the Lambert W function are introduced to solve the Poisson equation,and to derive the potential distribution of the active layer.In addition,the regional integration approach is used to develop a compact analytical current-voltage model.Although only two fitting parameters are required,a good agreement is obtained between the calculated results by the proposed model and the simulation results by TCAD.The proposed current-voltage model is then implemented by using Verilog-A for SPICE simulations of a dual-gate InGaZnO TFT integrated inverter circuit.
基金Project supported by the National Natural Science Foundation of China (Grant No. 61176069)the National Key Laboratory of Analog Integrated Circuit,China (Grant No. 9140C090304110C0905)the Innovation Foundation of the State Key Laboratory of Electronic Thin Films and Integrated Devices,China (Grant No. CXJJ201004)
文摘A new high voltage trench lateral double-diffused metal–oxide semiconductor （LDMOS） with ultra-low specific onresistance （R on,sp ） is proposed. The structure features a dual gate （DG LDMOS）： a planar gate and a trench gate inset in the oxide trench. Firstly, the dual gate can provide a dual conduction channel and reduce R on,sp dramatically. Secondly, the oxide trench in the drift region modulates the electric field distribution and reduces the cell pitch but still can maintain comparable breakdown voltage （BV）. Simulation results show that the cell pitch of the DG LDMOS can be reduced by 50% in comparison with that of conventional LDMOS at the equivalent BV; furthermore, R on,sp of the DG LDMOS can be reduced by 67% due to the smaller cell pitch and the dual gate.
文摘针对神经网络提取的信号特征不足导致信号识别率下降的问题,提出基于门控注意力网络的调制信号分类识别算法。该算法先对输入信号进行混合数据增强,生成更多维度的样本以便网络更好地提取信号特征;再将处理后的样本信号输入双通道网络(CNN and BiLSTM Parallel),并行提取信号的空间特征和时间特征;最后将提取到的特征输入到门控注意力网络中,自适应地调整特征权重,减少网络复杂度。实验表明,文中提出的算法最高分类准确率为92.3%,优于对比的其他网络模型。
