Long-time driving and monotonous visual environment increase the safety risk of driving in an extra-long tunnel.Driving fatigue can be effectively relieved by setting the visual fatigue relief zone in the tunnel.Howev...Long-time driving and monotonous visual environment increase the safety risk of driving in an extra-long tunnel.Driving fatigue can be effectively relieved by setting the visual fatigue relief zone in the tunnel.However,the setting form of visual fatigue relief zone,such as its length and location,is difficult to be designed and quantified.By integrating virtual reality(VR)apparatus with wearable electroencephalogram(EEG)-based devices,a hybrid method was proposed in this study to assist analyzers to formulate the layout of visual fatigue relief zone in the extra-long tunnel.The virtual environment of this study was based on an 11.5 km extra-long tunnel located in Yunnan Province in China.The results indicated that the use of natural landscape decoration inside the tunnel could improve driving fatigue with the growth rate of attention of the driver increased by more than 20%.The accumulation of driving fatigue had a negative effect on the fatigue relief.The results demonstrated that the optimal location of the fatigue relief zone was at the place where driving fatigue had just occurred rather than at the place where a certain amount of driving fatigue had accumulated.展开更多
Flatness pattern recognition is the key of the flatness control. The accuracy of the present flatness pattern recognition is limited and the shape defects cannot be reflected intuitively. In order to improve it, a nov...Flatness pattern recognition is the key of the flatness control. The accuracy of the present flatness pattern recognition is limited and the shape defects cannot be reflected intuitively. In order to improve it, a novel method via T-S cloud inference network optimized by genetic algorithm(GA) is proposed. T-S cloud inference network is constructed with T-S fuzzy neural network and the cloud model. So, the rapid of fuzzy logic and the uncertainty of cloud model for processing data are both taken into account. What's more, GA possesses good parallel design structure and global optimization characteristics. Compared with the simulation recognition results of traditional BP Algorithm, GA is more accurate and effective. Moreover, virtual reality technology is introduced into the field of shape control by Lab VIEW, MATLAB mixed programming. And virtual flatness pattern recognition interface is designed.Therefore, the data of engineering analysis and the actual model are combined with each other, and the shape defects could be seen more lively and intuitively.展开更多
A virtual reconfigurable architecture(VRA)-based evolvable hardware is proposed for automatic synthesis of combinational logic circuits at gate-level.The proposed VRA is implemented by a Celoxica RC1000 peripheral com...A virtual reconfigurable architecture(VRA)-based evolvable hardware is proposed for automatic synthesis of combinational logic circuits at gate-level.The proposed VRA is implemented by a Celoxica RC1000 peripheral component interconnect(PCI)board with an Xilinx Virtex xcv2000E field programmable gate array(FPGA).To improve the quality of the evolved circuits,the VRA works through a two-stage evolution: finding a functional circuit and minimizing the number of logic gates used in a feasible circuit.To optimize the algorithm performance in the two-stage evolutionary process and set free the user from the time-consuming process of mutation parameter tuning,a self-adaptive mutation rate control(SAMRC)scheme is introduced.In the evolutionary process,the mutation rate control parameters are encoded as additional genes in the chromosome and also undergo evolutionary operations.The efficiency of the proposed methodology is tested with the evolutions of a 4-bit even parity function,a 2-bit multiplier,and a 3-bit multiplier.The obtained results demonstrate that our scheme improves the evolutionary design of combinational logic circuits in terms of quality of the evolved circuit as well as the computational effort,when compared to the existing evolvable hardware approaches.展开更多
基金Project(2018YFB2101000) supported by the National Key R&D Program of ChinaProject(20YF1451400) supported by Shanghai Sailing Program,ChinaProject(SLDRCE19-A-14) supported by the Research Fund of State Key Laboratory for Disaster Reduction in Civil Engineering,China。
文摘Long-time driving and monotonous visual environment increase the safety risk of driving in an extra-long tunnel.Driving fatigue can be effectively relieved by setting the visual fatigue relief zone in the tunnel.However,the setting form of visual fatigue relief zone,such as its length and location,is difficult to be designed and quantified.By integrating virtual reality(VR)apparatus with wearable electroencephalogram(EEG)-based devices,a hybrid method was proposed in this study to assist analyzers to formulate the layout of visual fatigue relief zone in the extra-long tunnel.The virtual environment of this study was based on an 11.5 km extra-long tunnel located in Yunnan Province in China.The results indicated that the use of natural landscape decoration inside the tunnel could improve driving fatigue with the growth rate of attention of the driver increased by more than 20%.The accumulation of driving fatigue had a negative effect on the fatigue relief.The results demonstrated that the optimal location of the fatigue relief zone was at the place where driving fatigue had just occurred rather than at the place where a certain amount of driving fatigue had accumulated.
基金Project(LJRC013)supported by the University Innovation Team of Hebei Province Leading Talent Cultivation,China
文摘Flatness pattern recognition is the key of the flatness control. The accuracy of the present flatness pattern recognition is limited and the shape defects cannot be reflected intuitively. In order to improve it, a novel method via T-S cloud inference network optimized by genetic algorithm(GA) is proposed. T-S cloud inference network is constructed with T-S fuzzy neural network and the cloud model. So, the rapid of fuzzy logic and the uncertainty of cloud model for processing data are both taken into account. What's more, GA possesses good parallel design structure and global optimization characteristics. Compared with the simulation recognition results of traditional BP Algorithm, GA is more accurate and effective. Moreover, virtual reality technology is introduced into the field of shape control by Lab VIEW, MATLAB mixed programming. And virtual flatness pattern recognition interface is designed.Therefore, the data of engineering analysis and the actual model are combined with each other, and the shape defects could be seen more lively and intuitively.
基金Projects(61203308,61309014)supported by the National Natural Science Foundation of China
文摘A virtual reconfigurable architecture(VRA)-based evolvable hardware is proposed for automatic synthesis of combinational logic circuits at gate-level.The proposed VRA is implemented by a Celoxica RC1000 peripheral component interconnect(PCI)board with an Xilinx Virtex xcv2000E field programmable gate array(FPGA).To improve the quality of the evolved circuits,the VRA works through a two-stage evolution: finding a functional circuit and minimizing the number of logic gates used in a feasible circuit.To optimize the algorithm performance in the two-stage evolutionary process and set free the user from the time-consuming process of mutation parameter tuning,a self-adaptive mutation rate control(SAMRC)scheme is introduced.In the evolutionary process,the mutation rate control parameters are encoded as additional genes in the chromosome and also undergo evolutionary operations.The efficiency of the proposed methodology is tested with the evolutions of a 4-bit even parity function,a 2-bit multiplier,and a 3-bit multiplier.The obtained results demonstrate that our scheme improves the evolutionary design of combinational logic circuits in terms of quality of the evolved circuit as well as the computational effort,when compared to the existing evolvable hardware approaches.
