An in-pixel histogramming time-to-digital converter(hTDC)based on octonary search and 4-tap phase detection is presented,aiming to improve frame rate while ensuring high precicion.The proposed hTDC is a 12-bit two-ste...An in-pixel histogramming time-to-digital converter(hTDC)based on octonary search and 4-tap phase detection is presented,aiming to improve frame rate while ensuring high precicion.The proposed hTDC is a 12-bit two-step converter consisting of a 6-bit coarse quantization and a 6-bit fine quantization,which supports a time resolution of 120 ps and multiphoton counting up to 2 GHz without a GHz reference frequency.The proposed hTDC is designed in 0.11μm CMOS process with an area consumption of 6900μm^(2).The data from a behavioral-level model is imported into the designed hTDC circuit for simulation verification.The post-simulation results show that the proposed hTDC achieves 0.8%depth precision in 9 m range for short-range system design specifications and 0.2%depth precision in 48 m range for long-range system design specifications.Under 30×10^(3) lux background light conditions,the proposed hTDC can be used for SPAD-based flash LiDAR sensor to achieve a frame rate to 40 fps with 200 ps resolution in 9 m range.展开更多
介绍了游标时数转换器(TDC)和循环时数转换器这两种用于实时多点检测电源网络IR压降的方案。游标TDC方案采用精调粗调结合的思想,在继承传统时数转换器方案高精度、单周期响应优点的基础上,对面积进行了优化。循环TDC方案采用倍频的思想...介绍了游标时数转换器(TDC)和循环时数转换器这两种用于实时多点检测电源网络IR压降的方案。游标TDC方案采用精调粗调结合的思想,在继承传统时数转换器方案高精度、单周期响应优点的基础上,对面积进行了优化。循环TDC方案采用倍频的思想,在继承单周期响应的环振(RO)方案小面积优点的基础上,对精度进行了优化。电路分别基于SMIC 28 nm高介电常数金属栅(HKMG)工艺进行仿真。仿真结果表明,与TDC方案相比,游标TDC方案在维持13.5 m V/bit高精度和单周期响应优点的同时,面积仅为163.75μm^2,减小了29%;而与同为单周期响应的环振方案相比,循环TDC方案维持92.25μm^2小面积优点的同时,精度达到40.5 m V/bit,提高了54%。展开更多
基金National Key Research and Development Program of China(2022YFB2804401)。
文摘An in-pixel histogramming time-to-digital converter(hTDC)based on octonary search and 4-tap phase detection is presented,aiming to improve frame rate while ensuring high precicion.The proposed hTDC is a 12-bit two-step converter consisting of a 6-bit coarse quantization and a 6-bit fine quantization,which supports a time resolution of 120 ps and multiphoton counting up to 2 GHz without a GHz reference frequency.The proposed hTDC is designed in 0.11μm CMOS process with an area consumption of 6900μm^(2).The data from a behavioral-level model is imported into the designed hTDC circuit for simulation verification.The post-simulation results show that the proposed hTDC achieves 0.8%depth precision in 9 m range for short-range system design specifications and 0.2%depth precision in 48 m range for long-range system design specifications.Under 30×10^(3) lux background light conditions,the proposed hTDC can be used for SPAD-based flash LiDAR sensor to achieve a frame rate to 40 fps with 200 ps resolution in 9 m range.
文摘介绍了游标时数转换器(TDC)和循环时数转换器这两种用于实时多点检测电源网络IR压降的方案。游标TDC方案采用精调粗调结合的思想,在继承传统时数转换器方案高精度、单周期响应优点的基础上,对面积进行了优化。循环TDC方案采用倍频的思想,在继承单周期响应的环振(RO)方案小面积优点的基础上,对精度进行了优化。电路分别基于SMIC 28 nm高介电常数金属栅(HKMG)工艺进行仿真。仿真结果表明,与TDC方案相比,游标TDC方案在维持13.5 m V/bit高精度和单周期响应优点的同时,面积仅为163.75μm^2,减小了29%;而与同为单周期响应的环振方案相比,循环TDC方案维持92.25μm^2小面积优点的同时,精度达到40.5 m V/bit,提高了54%。
