为增强电子档案资料管理水平,设计一种基于单标签射频识别(radio frequency identification,RFID)的电子档案分类管理系统。使用RFID搭建系统框架,通过中心数据库、终端管理器模块实现RFID数据存储与传输,运用文件管理、档案管理、开发...为增强电子档案资料管理水平,设计一种基于单标签射频识别(radio frequency identification,RFID)的电子档案分类管理系统。使用RFID搭建系统框架,通过中心数据库、终端管理器模块实现RFID数据存储与传输,运用文件管理、档案管理、开发利用及系统维护4个模块完成电子档案分类管理日常运维;引入模糊聚类算法提取电子档案数据信息熵,使用关联规则实现数据融合与自主调度,特征分解数据运行状态信息,并通过神经网络组建分类器对电子档案分类。实验结果证明:该系统运行时能实现高负载均衡,且CPU利用率低,在分类管理方面拥有准确率高、响应速率快等优势。展开更多
A single poly EEPROM cell circuit sharing the deep N-well of a cell array was designed using the logic process. The proposed cell is written by the FN tunneling scheme and the cell size is 41.26 μm2, about 37% smalle...A single poly EEPROM cell circuit sharing the deep N-well of a cell array was designed using the logic process. The proposed cell is written by the FN tunneling scheme and the cell size is 41.26 μm2, about 37% smaller than the conventional cell. Also, a small-area and low-power 512-bit EEPROM IP was designed using the proposed cells which was used for a 900 MHz passive UHF RFID tag chip. To secure the operation of the cell proposed with 3.3 V devices and the reliability of the used devices, an EEPROM core circuit and a DC-DC converter were proposed. Simulation results for the designed EEPROM IP based on the 0.18μm logic process show that the power consumptions in read mode, program mode and erase mode are 11.82, 25.15, and 24.08 ~tW, respectively, and the EEPROM size is 0.12 mm2.展开更多
文摘为增强电子档案资料管理水平,设计一种基于单标签射频识别(radio frequency identification,RFID)的电子档案分类管理系统。使用RFID搭建系统框架,通过中心数据库、终端管理器模块实现RFID数据存储与传输,运用文件管理、档案管理、开发利用及系统维护4个模块完成电子档案分类管理日常运维;引入模糊聚类算法提取电子档案数据信息熵,使用关联规则实现数据融合与自主调度,特征分解数据运行状态信息,并通过神经网络组建分类器对电子档案分类。实验结果证明:该系统运行时能实现高负载均衡,且CPU利用率低,在分类管理方面拥有准确率高、响应速率快等优势。
基金Project(10039239) supported by the Industrial Strategic Technology Development Program Funded by the Ministry of Knowledge Economy, Korea
文摘A single poly EEPROM cell circuit sharing the deep N-well of a cell array was designed using the logic process. The proposed cell is written by the FN tunneling scheme and the cell size is 41.26 μm2, about 37% smaller than the conventional cell. Also, a small-area and low-power 512-bit EEPROM IP was designed using the proposed cells which was used for a 900 MHz passive UHF RFID tag chip. To secure the operation of the cell proposed with 3.3 V devices and the reliability of the used devices, an EEPROM core circuit and a DC-DC converter were proposed. Simulation results for the designed EEPROM IP based on the 0.18μm logic process show that the power consumptions in read mode, program mode and erase mode are 11.82, 25.15, and 24.08 ~tW, respectively, and the EEPROM size is 0.12 mm2.
