随着我国海上油气田区域和现有油田进行调整开发以及中心平台注水量的增大,大功率注水泵的需求日益增加。依托渤海某海上油田项目,设计了2 000 k W级大功率注水泵,确定了注水泵的泵型和结构,计算了注水泵的主要参数,进行了CFD流场、有...随着我国海上油气田区域和现有油田进行调整开发以及中心平台注水量的增大,大功率注水泵的需求日益增加。依托渤海某海上油田项目,设计了2 000 k W级大功率注水泵,确定了注水泵的泵型和结构,计算了注水泵的主要参数,进行了CFD流场、有限元强度及水力性能的分析,总结了注水泵设计关键技术,探讨了示范应用策略。本文设计的注水泵达到国外同类产品技术水平,较同类进口设备降低费用70%以上,可有力推进海洋工程注水关键设备国产化工作,促进海上油田开发降本增效。展开更多
In this work, power efficient butterfly unit based FFT architecture is presented. The butterfly unit is designed using floating-point fused arithmetic units. The fused arithmetic units include two-term dot product uni...In this work, power efficient butterfly unit based FFT architecture is presented. The butterfly unit is designed using floating-point fused arithmetic units. The fused arithmetic units include two-term dot product unit and add-subtract unit. In these arithmetic units, operations are performed over complex data values. A modified fused floating-point two-term dot product and an enhanced model for the Radix-4 FFT butterfly unit are proposed. The modified fused two-term dot product is designed using Radix-16 booth multiplier. Radix-16 booth multiplier will reduce the switching activities compared to Radix-8 booth multiplier in existing system and also will reduce the area required. The proposed architecture is implemented efficiently for Radix-4 decimation in time(DIT) FFT butterfly with the two floating-point fused arithmetic units. The proposed enhanced architecture is synthesized, implemented, placed and routed on a FPGA device using Xilinx ISE tool. It is observed that the Radix-4 DIT fused floating-point FFT butterfly requires 50.17% less space and 12.16% reduced power compared to the existing methods and the proposed enhanced model requires 49.82% less space on the FPGA device compared to the proposed design. Also, reduced power consumption is addressed by utilizing the reusability technique, which results in 11.42% of power reduction of the enhanced model compared to the proposed design.展开更多
A novel 50 kW fast charger was proposed for electric vehicles. The proposed fast charger is divided into two main sections an AC-DC converter performing a PFC function and a DC-DC converter performing a charging funct...A novel 50 kW fast charger was proposed for electric vehicles. The proposed fast charger is divided into two main sections an AC-DC converter performing a PFC function and a DC-DC converter performing a charging function. A transformer including leakage inductances was used in the AC-DC converter in order to obtain isolation and inductance. A series-connection topology was used in the DC-DC converter between the DC-bus and outlet. This topology enables high power conversion efficiency up to 95% for the DC-DC converter. In order to reduce the impact of the 50 kW charging on the AC grid, the proposed fast charger system includes a buffering battery unit between the two main power conversion units. This leads to reductions in the power installation costs of power companies and to improvements in the power quality were verified through simulations and experimental results. on the AC grid. The performances of the proposed fast charger system展开更多
A single machine-infinite-bus(SMIB) system including the interline power flow controllers(IPFCs) and the power system stabilizer(PSS) controller is addressed. The linearized system model is considered for investigatin...A single machine-infinite-bus(SMIB) system including the interline power flow controllers(IPFCs) and the power system stabilizer(PSS) controller is addressed. The linearized system model is considered for investigating the interactions among IPFC and PSS controllers. To improve the stability of whole system again different disturbances, a lead-lag controller is considered to produce supplementary signal. The proposed supplementary controller is implemented to improve the damping of the power system low frequency oscillations(LFOs). Imperialist optimization algorithm(ICA) and shuffled frog leaping algorithm(SFLA) are implemented to search for optimal supplementary controllers and PSS parameters. Moreover, singular value decomposition(SVD) method is utilized to select the most effective damping control signal of IPFC lead-lag controllers. To evaluate the system performance, different operating conditions are considered. Reponses of system in five modes including uncoordinated and coordinated modes of IPFC and PSS using ICA and SFLA are studied and compared. Considering the results, response of system without controller shows the highest overshoot and the longest settling time for rotor angel at the different operating conditions. In this mode of system, rotor speed has the highest overshoot. Rotor angel in the system with only PSS includes lower overshoot and oscillation than system without controller. When PSS is only implemented, rotor speed deviation has the longest settling time. Rotor speed deviation in the uncoordinated mode of IPFC and PSS shows lower overshoot than system with only PSS and without controller. It is noticeable that in this mode, rotor angel has higher overshoot than system with only PSS. The superiority of the suggested ICA-based coordinated controllers is obvious compared with SFLA-based coordinated controllers and other system modes. Responses of coordinated PSS and IPFC SFLA-based supplementary controllers include higher peak amplitude and longer settling time compared with coordinated IPFC and PSS ICA-based controllers. This comparison shows that overshoots, undershoots and the settling times are reduced considerably in coordinated mode of IPFC based controller and PSS using ICA. Analysis of the system performance shows that the proposed method has excellent response to different faults in power system.展开更多
文摘随着我国海上油气田区域和现有油田进行调整开发以及中心平台注水量的增大,大功率注水泵的需求日益增加。依托渤海某海上油田项目,设计了2 000 k W级大功率注水泵,确定了注水泵的泵型和结构,计算了注水泵的主要参数,进行了CFD流场、有限元强度及水力性能的分析,总结了注水泵设计关键技术,探讨了示范应用策略。本文设计的注水泵达到国外同类产品技术水平,较同类进口设备降低费用70%以上,可有力推进海洋工程注水关键设备国产化工作,促进海上油田开发降本增效。
文摘In this work, power efficient butterfly unit based FFT architecture is presented. The butterfly unit is designed using floating-point fused arithmetic units. The fused arithmetic units include two-term dot product unit and add-subtract unit. In these arithmetic units, operations are performed over complex data values. A modified fused floating-point two-term dot product and an enhanced model for the Radix-4 FFT butterfly unit are proposed. The modified fused two-term dot product is designed using Radix-16 booth multiplier. Radix-16 booth multiplier will reduce the switching activities compared to Radix-8 booth multiplier in existing system and also will reduce the area required. The proposed architecture is implemented efficiently for Radix-4 decimation in time(DIT) FFT butterfly with the two floating-point fused arithmetic units. The proposed enhanced architecture is synthesized, implemented, placed and routed on a FPGA device using Xilinx ISE tool. It is observed that the Radix-4 DIT fused floating-point FFT butterfly requires 50.17% less space and 12.16% reduced power compared to the existing methods and the proposed enhanced model requires 49.82% less space on the FPGA device compared to the proposed design. Also, reduced power consumption is addressed by utilizing the reusability technique, which results in 11.42% of power reduction of the enhanced model compared to the proposed design.
基金Project supported by Changwon National University in 2011-2012
文摘A novel 50 kW fast charger was proposed for electric vehicles. The proposed fast charger is divided into two main sections an AC-DC converter performing a PFC function and a DC-DC converter performing a charging function. A transformer including leakage inductances was used in the AC-DC converter in order to obtain isolation and inductance. A series-connection topology was used in the DC-DC converter between the DC-bus and outlet. This topology enables high power conversion efficiency up to 95% for the DC-DC converter. In order to reduce the impact of the 50 kW charging on the AC grid, the proposed fast charger system includes a buffering battery unit between the two main power conversion units. This leads to reductions in the power installation costs of power companies and to improvements in the power quality were verified through simulations and experimental results. on the AC grid. The performances of the proposed fast charger system
文摘A single machine-infinite-bus(SMIB) system including the interline power flow controllers(IPFCs) and the power system stabilizer(PSS) controller is addressed. The linearized system model is considered for investigating the interactions among IPFC and PSS controllers. To improve the stability of whole system again different disturbances, a lead-lag controller is considered to produce supplementary signal. The proposed supplementary controller is implemented to improve the damping of the power system low frequency oscillations(LFOs). Imperialist optimization algorithm(ICA) and shuffled frog leaping algorithm(SFLA) are implemented to search for optimal supplementary controllers and PSS parameters. Moreover, singular value decomposition(SVD) method is utilized to select the most effective damping control signal of IPFC lead-lag controllers. To evaluate the system performance, different operating conditions are considered. Reponses of system in five modes including uncoordinated and coordinated modes of IPFC and PSS using ICA and SFLA are studied and compared. Considering the results, response of system without controller shows the highest overshoot and the longest settling time for rotor angel at the different operating conditions. In this mode of system, rotor speed has the highest overshoot. Rotor angel in the system with only PSS includes lower overshoot and oscillation than system without controller. When PSS is only implemented, rotor speed deviation has the longest settling time. Rotor speed deviation in the uncoordinated mode of IPFC and PSS shows lower overshoot than system with only PSS and without controller. It is noticeable that in this mode, rotor angel has higher overshoot than system with only PSS. The superiority of the suggested ICA-based coordinated controllers is obvious compared with SFLA-based coordinated controllers and other system modes. Responses of coordinated PSS and IPFC SFLA-based supplementary controllers include higher peak amplitude and longer settling time compared with coordinated IPFC and PSS ICA-based controllers. This comparison shows that overshoots, undershoots and the settling times are reduced considerably in coordinated mode of IPFC based controller and PSS using ICA. Analysis of the system performance shows that the proposed method has excellent response to different faults in power system.
