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Research on multi-time scale doubly-fed wind turbine test system based on FPGA+CPU heterogeneous calculation
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作者 Qing Mu Xing Zhang +3 位作者 Xiaoxin Zhou Xiaowei Fan Yingmei Liu Dongbo Pan 《Global Energy Interconnection》 2019年第1期7-18,共12页
As the proportion of renewable energy increases, the interaction between renewable energy devices and the grid continues to enhance. Therefore, the renewable energy dynamic test in a power system has become more and m... As the proportion of renewable energy increases, the interaction between renewable energy devices and the grid continues to enhance. Therefore, the renewable energy dynamic test in a power system has become more and more important. Traditional dynamic simulation systems and digital-analog hybrid simulation systems are difficult to compromise on the economy, flexibility and accuracy. A multi-time scale test system of doubly fed induction generator based on FPGA+ CPU heterogeneous calculation is proposed in this paper. The proposed test system is based on the ADPSS simulation platform. The power circuit part of the test system is setup up using the EMT(electromagnetic transient simulation) simulation, and the control part uses the actual physical devices. In order to realize the close-loop testing for the physical devices, the power circuit must be simulated in real-time. This paper proposes a multi-time scale simulation algorithm, in which the decoupling component divides the power circuit into a large time scale system and a small time scale system in order to reduce computing effort. This paper also proposes the FPGA+CPU heterogeneous computing architecture for implementing this multitime scale simulation. In FPGA, there is a complete small time-scale EMT engine, which support the flexibly circuit modeling with any topology. Finally, the test system is connected to an DFIG controller based on Labview to verify the feasibility of the test system. 展开更多
关键词 Renewable energy gen erati on DOUBLY fed in duction generator ADPSS simulati on SYSTEM Wind turbine test SYSTEM Multi-time scale FPGA+CPU
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