Test data compression and test resource partitioning （TRP） are essential to reduce the amount of test data in system-on-chip testing. A novel variable-to-variable-length compression codes is designed as advanced fre...Test data compression and test resource partitioning （TRP） are essential to reduce the amount of test data in system-on-chip testing. A novel variable-to-variable-length compression codes is designed as advanced fre- quency-directed run-length （AFDR） codes. Different [rom frequency-directed run-length （FDR） codes, AFDR encodes both 0- and 1-runs and uses the same codes to the equal length runs. It also modifies the codes for 00 and 11 to improve the compression performance. Experimental results for ISCAS 89 benchmark circuits show that AFDR codes achieve higher compression ratio than FDR and other compression codes.展开更多
Single-event effects(SEEs)induced by mediumenergy protons in a 28 nm system-on-chip(SoC)were investigated at the China Institute of Atomic Energy.An on-chip memory block was irradiated with 90 MeV and 70 MeV protons,r...Single-event effects(SEEs)induced by mediumenergy protons in a 28 nm system-on-chip(SoC)were investigated at the China Institute of Atomic Energy.An on-chip memory block was irradiated with 90 MeV and 70 MeV protons,respectively.Single-bit upset and multicell upset events were observed,and an uppermost number of nine upset cells were discovered in the 90 MeV proton irradiation test.The results indicate that the SEE sensitivities of the 28 nm SoC to the 90 MeV and 70 MeV protons were similar.Cosmic Ray Effects on Micro-Electronics Monte Carlo simulations were analyzed,and it demonstrates that protons can induce effects in a 28 nm SoC if their energies are greater than 1.4 MeV and that the lowest corresponding linear energy transfer was 0.142 MeV cm^2 mg^-1.The similarities and discrepancies of the SEEs induced by the 90 MeV and 70 MeV protons were analyzed.展开更多
To decrease the cost of exchanging load information among processors, a dynamic load-balancing （DLB） algorithm which adopts multieast tree technology is proposed. The muhieast tree construction rules are also propos...To decrease the cost of exchanging load information among processors, a dynamic load-balancing （DLB） algorithm which adopts multieast tree technology is proposed. The muhieast tree construction rules are also proposed to avoid wrongly transferred or redundant DLB messages due to the overlapping of multicast trees. The proposed DLB algorithm is distributed controlled, sender initiated and can help heavily loaded processors with complete distribution of redundant loads with minimum number of executions. Experiments were executed to compare the effects of the proposed DLB algorithm and other three ones, the results prove the effectivity and practicability of the proposed algorithm in dealing with great scale compute-intensive tasks.展开更多
Single event effects (SEEs) in a 28-nm system-on-chip (SoC) were assessed using heavy ion irradiations, and susceptibilities in different processor configurations with data accessing patterns were investigated. The pa...Single event effects (SEEs) in a 28-nm system-on-chip (SoC) were assessed using heavy ion irradiations, and susceptibilities in different processor configurations with data accessing patterns were investigated. The patterns included the sole processor (SP) and asymmetric multiprocessing (AMP) patterns with static and dynamic data accessing. Single event upset (SEU) cross sections in static accessing can be more than twice as high as those of the dynamic accessing, and processor configuration pattern is not a critical factor for the SEU cross sections. Cross section interval of upset events was evaluated and the soft error rates in aerospace environment were predicted for the SoC. The tests also indicated that ultra-high linear energy transfer (LET) particle can cause exception currents in the 28-nm SoC, and some even are lower than the normal case.展开更多
基金Supported by the National Natural Science Foundation of China(61076019,61106018)the Aeronautical Science Foundation of China(20115552031)+3 种基金the China Postdoctoral Science Foundation(20100481134)the Jiangsu Province Key Technology R&D Program(BE2010003)the Nanjing University of Aeronautics and Astronautics Research Funding(NS2010115)the Nanjing University of Aeronatics and Astronautics Initial Funding for Talented Faculty(1004-YAH10027)~~
文摘Test data compression and test resource partitioning （TRP） are essential to reduce the amount of test data in system-on-chip testing. A novel variable-to-variable-length compression codes is designed as advanced fre- quency-directed run-length （AFDR） codes. Different [rom frequency-directed run-length （FDR） codes, AFDR encodes both 0- and 1-runs and uses the same codes to the equal length runs. It also modifies the codes for 00 and 11 to improve the compression performance. Experimental results for ISCAS 89 benchmark circuits show that AFDR codes achieve higher compression ratio than FDR and other compression codes.
基金supported by the National Natural Science Foundation of China(Grant Nos.11575138,11835006,11690040,and 11690043)
文摘Single-event effects(SEEs)induced by mediumenergy protons in a 28 nm system-on-chip(SoC)were investigated at the China Institute of Atomic Energy.An on-chip memory block was irradiated with 90 MeV and 70 MeV protons,respectively.Single-bit upset and multicell upset events were observed,and an uppermost number of nine upset cells were discovered in the 90 MeV proton irradiation test.The results indicate that the SEE sensitivities of the 28 nm SoC to the 90 MeV and 70 MeV protons were similar.Cosmic Ray Effects on Micro-Electronics Monte Carlo simulations were analyzed,and it demonstrates that protons can induce effects in a 28 nm SoC if their energies are greater than 1.4 MeV and that the lowest corresponding linear energy transfer was 0.142 MeV cm^2 mg^-1.The similarities and discrepancies of the SEEs induced by the 90 MeV and 70 MeV protons were analyzed.
基金the National Natural Science Foundation of China(69973007)
文摘To decrease the cost of exchanging load information among processors, a dynamic load-balancing （DLB） algorithm which adopts multieast tree technology is proposed. The muhieast tree construction rules are also proposed to avoid wrongly transferred or redundant DLB messages due to the overlapping of multicast trees. The proposed DLB algorithm is distributed controlled, sender initiated and can help heavily loaded processors with complete distribution of redundant loads with minimum number of executions. Experiments were executed to compare the effects of the proposed DLB algorithm and other three ones, the results prove the effectivity and practicability of the proposed algorithm in dealing with great scale compute-intensive tasks.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.11575138,11835006,11690040,and 11690043)the Fund from Innovation Center of Radiation Application(Grant No.KFZC2019050321)+1 种基金the Fund from the Science and Technology on Vacuum Technology and Physics Laboratory,Lanzhou Institute of Physics(Grant No.ZWK1804)the Program of China Scholarships Council(Grant No.201906280343)。
文摘Single event effects (SEEs) in a 28-nm system-on-chip (SoC) were assessed using heavy ion irradiations, and susceptibilities in different processor configurations with data accessing patterns were investigated. The patterns included the sole processor (SP) and asymmetric multiprocessing (AMP) patterns with static and dynamic data accessing. Single event upset (SEU) cross sections in static accessing can be more than twice as high as those of the dynamic accessing, and processor configuration pattern is not a critical factor for the SEU cross sections. Cross section interval of upset events was evaluated and the soft error rates in aerospace environment were predicted for the SoC. The tests also indicated that ultra-high linear energy transfer (LET) particle can cause exception currents in the 28-nm SoC, and some even are lower than the normal case.
