A novel optical analog-to-digital converter based on optical time division multiplexing(OTDM) is described which uses electrooptic sampling and time-demultiplexing together with multiple electronic analog-to-digital c...A novel optical analog-to-digital converter based on optical time division multiplexing(OTDM) is described which uses electrooptic sampling and time-demultiplexing together with multiple electronic analog-to-digital converter(ADC). Compared with the previous scheme, the time-division multiplexer and the time-division demultiplexer are applied in the optical analog-to-digital converter(OADC) at the same time, the design of the OADC is simplified and the performance of the OADC based on time-division demultiplexer is improved. A core optical part of the system is demonstrated with a sample rate of 10 Gs/s. The signals in three channels are demultiplexed from the optical pulses.The result proves our scheme is feasible.展开更多
为满足5.8 GHz雷达系统的需要,在HLMC55LP工艺中设计了一款12 bit SAR ADC,ADC的采样率为500 kHz/250 kHz两档可调,采用单调电容开关时序,且在电容阵列的高位部分加上2个冗余位设计,该冗余位对高位的CDAC建立误差,比较器误差都有一定的...为满足5.8 GHz雷达系统的需要,在HLMC55LP工艺中设计了一款12 bit SAR ADC,ADC的采样率为500 kHz/250 kHz两档可调,采用单调电容开关时序,且在电容阵列的高位部分加上2个冗余位设计,该冗余位对高位的CDAC建立误差,比较器误差都有一定的容忍能力,可以带来ADC性能上的提升。系统采用上极板采样,可以在采样周期结束的瞬间就开始逐位比较过程,省去了采用底极板采样第一拍CDAC建立的过程,提高了转换速度,相对于底极板采样也节省了一定的开关功耗。后仿结果表明,模拟输入20 kHz差分中频信号,在500 kHz采样频率,3.3 V电源电压下,ADC的有效位数为11.56 bit,SNR为71.04 dB,SFDR为80.37 dBc,功耗约为2 mW。展开更多
设计了一种具有中频采样功能的流水线ADC采样保持前端电路。采样保持前端电路采用基于开关电容的底板采样翻转式结构,运算放大器采用了米勒补偿型两级结构以提高信号摆幅,采样开关采用了消除衬底偏置效应的自举开关以提高中频采样特性...设计了一种具有中频采样功能的流水线ADC采样保持前端电路。采样保持前端电路采用基于开关电容的底板采样翻转式结构,运算放大器采用了米勒补偿型两级结构以提高信号摆幅,采样开关采用了消除衬底偏置效应的自举开关以提高中频采样特性。该采样保持前端电路被运用于一种12位250 MSPS流水线ADC,电路采用0.18μm 1P5M 1.8 V CMOS工艺实现,测试结果表明该ADC电路在全速采样条件下对于20 MHz的输入信号得到的SNR为69.92 d B,SFDR为81.17 d B,-3 d B带宽达700 MHz以上,整个前端电路的功耗为58 m W。展开更多
文摘A novel optical analog-to-digital converter based on optical time division multiplexing(OTDM) is described which uses electrooptic sampling and time-demultiplexing together with multiple electronic analog-to-digital converter(ADC). Compared with the previous scheme, the time-division multiplexer and the time-division demultiplexer are applied in the optical analog-to-digital converter(OADC) at the same time, the design of the OADC is simplified and the performance of the OADC based on time-division demultiplexer is improved. A core optical part of the system is demonstrated with a sample rate of 10 Gs/s. The signals in three channels are demultiplexed from the optical pulses.The result proves our scheme is feasible.
文摘设计了一种具有中频采样功能的流水线ADC采样保持前端电路。采样保持前端电路采用基于开关电容的底板采样翻转式结构,运算放大器采用了米勒补偿型两级结构以提高信号摆幅,采样开关采用了消除衬底偏置效应的自举开关以提高中频采样特性。该采样保持前端电路被运用于一种12位250 MSPS流水线ADC,电路采用0.18μm 1P5M 1.8 V CMOS工艺实现,测试结果表明该ADC电路在全速采样条件下对于20 MHz的输入信号得到的SNR为69.92 d B,SFDR为81.17 d B,-3 d B带宽达700 MHz以上,整个前端电路的功耗为58 m W。