This paper proposes a parallel cyclic shift structure of address decoder to realize a high-throughput encoding and decoding method for irregular-quasi-cyclic low-density parity-check(IR-QC-LDPC)codes,with a dual-diago...This paper proposes a parallel cyclic shift structure of address decoder to realize a high-throughput encoding and decoding method for irregular-quasi-cyclic low-density parity-check(IR-QC-LDPC)codes,with a dual-diagonal parity structure.A normalized min-sum algorithm(NMSA)is employed for decoding.The whole verification of the encoding and decoding algorithm is simulated with Matlab,and the code rates of 5/6 and 2/3 are selected respectively for the initial bit error ratio as 6%and 1.04%.Based on the results of simulation,multi-code rates are compatible with different basis matrices.Then the simulated algorithms of encoder and decoder are migrated and implemented on the field programmable gate array(FPGA).The 183.36 Mbps throughput of encoder and the average 27.85 Mbps decoding throughput with the initial bit error ratio 6%are realized based on FPGA.展开更多
针对传统软件控制器存在响应速度慢、精度低和抗干扰能力差的问题,文章基于现场可编程门阵列(field programmable gate array,FPGA)实现无刷直流电机(brushless direct current motor,BLDC)模糊PI控制系统的设计。该控制系统内部采用全...针对传统软件控制器存在响应速度慢、精度低和抗干扰能力差的问题,文章基于现场可编程门阵列(field programmable gate array,FPGA)实现无刷直流电机(brushless direct current motor,BLDC)模糊PI控制系统的设计。该控制系统内部采用全硬件实现方式,提高了系统的运算效率,增强了抗干扰能力;系统采用转速、电流双闭环控制,转速环采用模糊PI控制算法,相较于传统PI控制算法,提高了响应速度和控制精度。实验结果表明,文章设计的控制系统响应速度快、超调小、抗干扰能力强。展开更多
基金supported by the National Natural Science Foundation of China(11705191)the Anhui Provincial Natural Science Foundation(1808085QF180)the Natural Science Foundation of Shanghai(18ZR1443600)
文摘This paper proposes a parallel cyclic shift structure of address decoder to realize a high-throughput encoding and decoding method for irregular-quasi-cyclic low-density parity-check(IR-QC-LDPC)codes,with a dual-diagonal parity structure.A normalized min-sum algorithm(NMSA)is employed for decoding.The whole verification of the encoding and decoding algorithm is simulated with Matlab,and the code rates of 5/6 and 2/3 are selected respectively for the initial bit error ratio as 6%and 1.04%.Based on the results of simulation,multi-code rates are compatible with different basis matrices.Then the simulated algorithms of encoder and decoder are migrated and implemented on the field programmable gate array(FPGA).The 183.36 Mbps throughput of encoder and the average 27.85 Mbps decoding throughput with the initial bit error ratio 6%are realized based on FPGA.
文摘针对传统软件控制器存在响应速度慢、精度低和抗干扰能力差的问题,文章基于现场可编程门阵列(field programmable gate array,FPGA)实现无刷直流电机(brushless direct current motor,BLDC)模糊PI控制系统的设计。该控制系统内部采用全硬件实现方式,提高了系统的运算效率,增强了抗干扰能力;系统采用转速、电流双闭环控制,转速环采用模糊PI控制算法,相较于传统PI控制算法,提高了响应速度和控制精度。实验结果表明,文章设计的控制系统响应速度快、超调小、抗干扰能力强。
