In this paper,we propose an RLC equivalent circuit model theory which can accurately predict the spectral response and resonance characteristics of metamaterial absorption structures,extend its design,and characterize...In this paper,we propose an RLC equivalent circuit model theory which can accurately predict the spectral response and resonance characteristics of metamaterial absorption structures,extend its design,and characterize the parameters of the model in detail.By employing this model,we conducted computations to characterize the response wavelength and bandwidth of variously sized metamaterial absorbers.A comparative analysis with Finite Difference Time Domain(FDTD)simulations demonstrated a remarkable level of consistency in the results.The designed absorbers were fabricated using micro-nano fabrication processes,and were experimentally tested to demonstrate absorption rates exceeding 90%at a wavelength of 9.28μm.The predicted results are then compared with test results.The comparison reveals good consistency in two aspects of the resonance responses,thereby confirming the rationality and accuracy of this model.展开更多
The advent of Grover’s algorithm presents a significant threat to classical block cipher security,spurring research into post-quantum secure cipher design.This study engineers quantum circuit implementations for thre...The advent of Grover’s algorithm presents a significant threat to classical block cipher security,spurring research into post-quantum secure cipher design.This study engineers quantum circuit implementations for three versions of the Ballet family block ciphers.The Ballet‑p/k includes a modular-addition operation uncommon in lightweight block ciphers.Quantum ripple-carry adder is implemented for both“32+32”and“64+64”scale to support this operation.Subsequently,qubits,quantum gates count,and quantum circuit depth of three versions of Ballet algorithm are systematically evaluated under quantum computing model,and key recovery attack circuits are constructed based on Grover’s algorithm against each version.The comprehensive analysis shows:Ballet-128/128 fails to NIST Level 1 security,while when the resource accounting is restricted to the Clifford gates and T gates set for the Ballet-128/256 and Ballet-256/256 quantum circuits,the design attains Level 3.展开更多
This paper deals with fault isolation in nonlinear analog circuits with tolerance under an insufficient number of independent voltage measurements.A neural network-based L1-norm optimization approach is proposed and u...This paper deals with fault isolation in nonlinear analog circuits with tolerance under an insufficient number of independent voltage measurements.A neural network-based L1-norm optimization approach is proposed and utilized in locating the most likely faulty elements in nonlinear circuits.The validity of the proposed method is verified by both extensive computer simulations and practical examples.One simulation example is presented in the paper.展开更多
The theories of diagnosing nonlinear analog circuits by means of the transient response testing are studled. Wavelet analysis is made to extract the transient response signature of nonlinear circuits and compress the ...The theories of diagnosing nonlinear analog circuits by means of the transient response testing are studled. Wavelet analysis is made to extract the transient response signature of nonlinear circuits and compress the signature dada. The best wavelet function is selected based on the between-category total scatter of signature. The fault dictionary of nonlinear circuits is constructed based on improved back-propagation（BP） neural network. Experimental results demonstrate that the method proposed has high diagnostic sensitivity and fast fault identification and deducibility.展开更多
The data-driven fault diagnosis methods can improve the reliability of analog circuits by using the data generated from it. The data have some characteristics, such as randomness and incompleteness, which lead to the ...The data-driven fault diagnosis methods can improve the reliability of analog circuits by using the data generated from it. The data have some characteristics, such as randomness and incompleteness, which lead to the diagnostic results being sensitive to the specific values and random noise. This paper presents a data-driven fault diagnosis method for analog circuits based on the robust competitive agglomeration （RCA）, which can alleviate the incompleteness of the data by clustering with the competing process. And the robustness of the diagnostic results is enhanced by using the approach of robust statistics in RCA. A series of experiments are provided to demonstrate that RCA can classify the incomplete data with a high accuracy. The experimental results show that RCA is robust for the data needed to be classified as well as the parameters needed to be adjusted. The effectiveness of RCA in practical use is demonstrated by two analog circuits.展开更多
A method for robust analog fault diagnosis using hybrid neural networks is proposed. The primary focus of the paper is to provide robust diagnosis using a mechanism to deal with the problem of element tolerances and r...A method for robust analog fault diagnosis using hybrid neural networks is proposed. The primary focus of the paper is to provide robust diagnosis using a mechanism to deal with the problem of element tolerances and reduce testing time. The proposed approach is based on the fault dictionary diagnosis method and backward propagation neural network (BPNN) and the adaptive resonance theory (ART) neural network. Simulation results show that the method is robust and fast for fault diagnosis of analog circuits with tolerances.展开更多
A complete state variable current-mode biquadratic filter built by duo-output CCII (DOCCII) with variable current gain is presented. All the coefficients of the filter can be independently tuned through the variable c...A complete state variable current-mode biquadratic filter built by duo-output CCII (DOCCII) with variable current gain is presented. All the coefficients of the filter can be independently tuned through the variable current gain factors of the DOCCII. Based on the principles upon which the general biquadratic filter was constructed, a universal electronically tunable current-mode filter is proposed which implements the low-pass, high-pass, band-pass, band-suppress and all-pass second order transfer functions simultaneously. The PSPICE simulations of frequency responses of second-order filter of are also given.展开更多
As a method for testing a sequential circuit efficiently, a scan design is usually used. But, since this design has some drawbacks, a non-scan testable design should be discussed. The testable design can be implemente...As a method for testing a sequential circuit efficiently, a scan design is usually used. But, since this design has some drawbacks, a non-scan testable design should be discussed. The testable design can be implemented by enhancing controllability and observability. This paper discusses a non-scan testable design for a sequential circuit by only focusing the improvement of controllability. The proposed design modifies a circuit so that all the FFs can be directly controlled by primary input lines in a test mode. Experimental results show that we can get a good testability using this method.展开更多
An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used...An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used for design and fabrication and physical library development of thin film submicron and deep submicron CMOS/ SOI integrated circuit.展开更多
Device physics research for submicron and deep submicron space microelectronics devices and integrated circuits will be described in three topics.1.Thin film submicron and deep submicron SOS / CMOS devices and integra...Device physics research for submicron and deep submicron space microelectronics devices and integrated circuits will be described in three topics.1.Thin film submicron and deep submicron SOS / CMOS devices and integrated circuits.2.Deep submicron LDD CMOS devices and integrated circuits.3.C band and Ku band microwave GaAs MESFET and III-V compound hetrojunction HEM T and HBT devices and integrated circuits.展开更多
The electrostatic discharge(ESD)protection circuit widely exists in the input and output ports of CMOS digital circuits,and fast rising time electromagnetic pulse(FREMP)coupled into the device not only interacts with ...The electrostatic discharge(ESD)protection circuit widely exists in the input and output ports of CMOS digital circuits,and fast rising time electromagnetic pulse(FREMP)coupled into the device not only interacts with the CMOS circuit,but also acts on the protection circuit.This paper establishes a model of on-chip CMOS electrostatic discharge protection circuit and selects square pulse as the FREMP signals.Based on multiple physical parameter models,it depicts the distribution of the lattice temperature,current density,and electric field intensity inside the device.At the same time,this paper explores the changes of the internal devices in the circuit under the injection of fast rising time electromagnetic pulse and describes the relationship between the damage amplitude threshold and the pulse width.The results show that the ESD protection circuit has potential damage risk,and the injection of FREMP leads to irreversible heat loss inside the circuit.In addition,pulse signals with different attributes will change the damage threshold of the circuit.These results provide an important reference for further evaluation of the influence of electromagnetic environment on the chip,which is helpful to carry out the reliability enhancement research of ESD protection circuit.展开更多
Approximation techniques are useful for implementing pattern recognizers, communication decoders and sensory processing algorithms where computational precision is not critical to achieve the desired system level perf...Approximation techniques are useful for implementing pattern recognizers, communication decoders and sensory processing algorithms where computational precision is not critical to achieve the desired system level performance. In our previous work, we had proposed margin propagation (MP) as an efficient piece-wise linear (PWL) approximation technique to a log-sum-exp function and had demonstrated its advantages for implementing probabilistic decoders. In this paper, we present a systematic and a generalized approach for synthesizing analog piecewise-linear (PWL) computing circuits using the MP principle. MP circuits use only addition, subtraction and threshold operations and hence can be implemented using universal conservation principles like the Kirchoff's current law. Thus, unlike the conventional translinear CMOS current-mode circuits, the operation of the MP circuits are functionally similar in weak, moderate and strong inversion regimes of the MOS transistor making the design approach bias-scalable. This paper presents measured results from MP circuits prototyped in a 0.5μm standard CMOS process verifying the bias-scalable property. As an example, we apply the synthesis approach towards designing linear classifiers and verify its performance using measured results.展开更多
基金Supported by the National Natural Science Foundation of China(62174092)the Open Fund of State Key Laboratory of Infrared Physics(SITP-NLIST-ZD-2023-04)the Strategic Priority Research Program of the Chinese Academy of Sciences(XDB0580000)。
文摘In this paper,we propose an RLC equivalent circuit model theory which can accurately predict the spectral response and resonance characteristics of metamaterial absorption structures,extend its design,and characterize the parameters of the model in detail.By employing this model,we conducted computations to characterize the response wavelength and bandwidth of variously sized metamaterial absorbers.A comparative analysis with Finite Difference Time Domain(FDTD)simulations demonstrated a remarkable level of consistency in the results.The designed absorbers were fabricated using micro-nano fabrication processes,and were experimentally tested to demonstrate absorption rates exceeding 90%at a wavelength of 9.28μm.The predicted results are then compared with test results.The comparison reveals good consistency in two aspects of the resonance responses,thereby confirming the rationality and accuracy of this model.
基金State Key Lab of Processors,Institute of Computing Technology,Chinese Academy of Sciences(CLQ202516)the Fundamental Research Funds for the Central Universities of China(3282025047,3282024051,3282024009)。
文摘The advent of Grover’s algorithm presents a significant threat to classical block cipher security,spurring research into post-quantum secure cipher design.This study engineers quantum circuit implementations for three versions of the Ballet family block ciphers.The Ballet‑p/k includes a modular-addition operation uncommon in lightweight block ciphers.Quantum ripple-carry adder is implemented for both“32+32”and“64+64”scale to support this operation.Subsequently,qubits,quantum gates count,and quantum circuit depth of three versions of Ballet algorithm are systematically evaluated under quantum computing model,and key recovery attack circuits are constructed based on Grover’s algorithm against each version.The comprehensive analysis shows:Ballet-128/128 fails to NIST Level 1 security,while when the resource accounting is restricted to the Clifford gates and T gates set for the Ballet-128/256 and Ballet-256/256 quantum circuits,the design attains Level 3.
文摘This paper deals with fault isolation in nonlinear analog circuits with tolerance under an insufficient number of independent voltage measurements.A neural network-based L1-norm optimization approach is proposed and utilized in locating the most likely faulty elements in nonlinear circuits.The validity of the proposed method is verified by both extensive computer simulations and practical examples.One simulation example is presented in the paper.
基金This project was supported by the National Nature Science Foundation of China(60372001)
文摘The theories of diagnosing nonlinear analog circuits by means of the transient response testing are studled. Wavelet analysis is made to extract the transient response signature of nonlinear circuits and compress the signature dada. The best wavelet function is selected based on the between-category total scatter of signature. The fault dictionary of nonlinear circuits is constructed based on improved back-propagation（BP） neural network. Experimental results demonstrate that the method proposed has high diagnostic sensitivity and fast fault identification and deducibility.
基金supported by the National Natural Science Foundation of China (61202078 61071139)the National High Technology Research and Development Program of China (863 Program)(SQ2011AA110101)
文摘The data-driven fault diagnosis methods can improve the reliability of analog circuits by using the data generated from it. The data have some characteristics, such as randomness and incompleteness, which lead to the diagnostic results being sensitive to the specific values and random noise. This paper presents a data-driven fault diagnosis method for analog circuits based on the robust competitive agglomeration （RCA）, which can alleviate the incompleteness of the data by clustering with the competing process. And the robustness of the diagnostic results is enhanced by using the approach of robust statistics in RCA. A series of experiments are provided to demonstrate that RCA can classify the incomplete data with a high accuracy. The experimental results show that RCA is robust for the data needed to be classified as well as the parameters needed to be adjusted. The effectiveness of RCA in practical use is demonstrated by two analog circuits.
文摘A method for robust analog fault diagnosis using hybrid neural networks is proposed. The primary focus of the paper is to provide robust diagnosis using a mechanism to deal with the problem of element tolerances and reduce testing time. The proposed approach is based on the fault dictionary diagnosis method and backward propagation neural network (BPNN) and the adaptive resonance theory (ART) neural network. Simulation results show that the method is robust and fast for fault diagnosis of analog circuits with tolerances.
文摘A complete state variable current-mode biquadratic filter built by duo-output CCII (DOCCII) with variable current gain is presented. All the coefficients of the filter can be independently tuned through the variable current gain factors of the DOCCII. Based on the principles upon which the general biquadratic filter was constructed, a universal electronically tunable current-mode filter is proposed which implements the low-pass, high-pass, band-pass, band-suppress and all-pass second order transfer functions simultaneously. The PSPICE simulations of frequency responses of second-order filter of are also given.
文摘As a method for testing a sequential circuit efficiently, a scan design is usually used. But, since this design has some drawbacks, a non-scan testable design should be discussed. The testable design can be implemented by enhancing controllability and observability. This paper discusses a non-scan testable design for a sequential circuit by only focusing the improvement of controllability. The proposed design modifies a circuit so that all the FFs can be directly controlled by primary input lines in a test mode. Experimental results show that we can get a good testability using this method.
文摘Submicron CMOS IC technology, including triple layer resist lithography technology, RIE, LDD, Titanium Salicide, shallow junction, thin gate oxide, no bird's beak isolation and channel's multiple implantation doping technology have been developed. 0.50μm. CMOS integrated circuits have been fabricated using this submicron CMOS process.
文摘An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used for design and fabrication and physical library development of thin film submicron and deep submicron CMOS/ SOI integrated circuit.
文摘Device physics research for submicron and deep submicron space microelectronics devices and integrated circuits will be described in three topics.1.Thin film submicron and deep submicron SOS / CMOS devices and integrated circuits.2.Deep submicron LDD CMOS devices and integrated circuits.3.C band and Ku band microwave GaAs MESFET and III-V compound hetrojunction HEM T and HBT devices and integrated circuits.
基金National Natural Science Foundation of China(61974116)。
文摘The electrostatic discharge(ESD)protection circuit widely exists in the input and output ports of CMOS digital circuits,and fast rising time electromagnetic pulse(FREMP)coupled into the device not only interacts with the CMOS circuit,but also acts on the protection circuit.This paper establishes a model of on-chip CMOS electrostatic discharge protection circuit and selects square pulse as the FREMP signals.Based on multiple physical parameter models,it depicts the distribution of the lattice temperature,current density,and electric field intensity inside the device.At the same time,this paper explores the changes of the internal devices in the circuit under the injection of fast rising time electromagnetic pulse and describes the relationship between the damage amplitude threshold and the pulse width.The results show that the ESD protection circuit has potential damage risk,and the injection of FREMP leads to irreversible heat loss inside the circuit.In addition,pulse signals with different attributes will change the damage threshold of the circuit.These results provide an important reference for further evaluation of the influence of electromagnetic environment on the chip,which is helpful to carry out the reliability enhancement research of ESD protection circuit.
基金Supported by a Research Grant from The National Science Foundation(CCF:0728996)
文摘Approximation techniques are useful for implementing pattern recognizers, communication decoders and sensory processing algorithms where computational precision is not critical to achieve the desired system level performance. In our previous work, we had proposed margin propagation (MP) as an efficient piece-wise linear (PWL) approximation technique to a log-sum-exp function and had demonstrated its advantages for implementing probabilistic decoders. In this paper, we present a systematic and a generalized approach for synthesizing analog piecewise-linear (PWL) computing circuits using the MP principle. MP circuits use only addition, subtraction and threshold operations and hence can be implemented using universal conservation principles like the Kirchoff's current law. Thus, unlike the conventional translinear CMOS current-mode circuits, the operation of the MP circuits are functionally similar in weak, moderate and strong inversion regimes of the MOS transistor making the design approach bias-scalable. This paper presents measured results from MP circuits prototyped in a 0.5μm standard CMOS process verifying the bias-scalable property. As an example, we apply the synthesis approach towards designing linear classifiers and verify its performance using measured results.
