Following publication of the original article[1],the authors noticed a mistake in the Supplementary file,more specifically in figures S11 and S12 where they used by mistake the same sub-figures.The original article[1]...Following publication of the original article[1],the authors noticed a mistake in the Supplementary file,more specifically in figures S11 and S12 where they used by mistake the same sub-figures.The original article[1]has been corrected.展开更多
The impact of the variations of threshold voltage(V_(th))and hold voltage(V_(hold))of threshold switching(TS)selector in1 S1 R crossbar array is investigated.Based on ON/OFF state I–V curves measurements from a large...The impact of the variations of threshold voltage(V_(th))and hold voltage(V_(hold))of threshold switching(TS)selector in1 S1 R crossbar array is investigated.Based on ON/OFF state I–V curves measurements from a large number of Ag-filament TS selectors,V_(th)and V_(hold)are extracted and their variations distribution expressions are obtained,which are then employed to evaluate the impact on read process and write process in 32×321 S1 R crossbar array under different bias schemes.The results indicate that V_(th)and V_(hold)variations of TS selector can lead to degradation of 1 S1 R array performance parameters,such as minimum read/write voltage,bit error rate(BER),and power consumption.For the read process,a small V_(hold)variation not only results in the minimum read voltage increasing but it also leads to serious degradation of BER.As the standard deviation of V_(hold)and V_(th)increases,the BER and the power consumption of 1 S1 R crossbar array under 1/2 bias,1/3 bias,and floating scheme degrade,and the case under 1/2 bias tends to be more serious compared with other two schemes.For the write process,the minimum write voltage also increases with the variation of V_(hold)from small to large value.A slight increase of V_(th)standard deviation not only decreases write power efficiency markedly but also increases write power consumption.These results have reference significance to understand the voltage variation impacts and design of selector properly.展开更多
The new type of embedded signal processing system based on the packet switched network is achieved. According to the application field and the-characteristics of signal processing system, the RapidIO protocol is used ...The new type of embedded signal processing system based on the packet switched network is achieved. According to the application field and the-characteristics of signal processing system, the RapidIO protocol is used to solve the high-speed interconnection of multi-digital signal processor （DSP）. Based on this protocol, a kind of crossbar switch module which is used to interconnect multi-DSP in the system is introduced. A route strategy, some flow control rules and error control rules, which adapt to different RapidIO network topology are also introduced. Crossbar switch performance is analyzed in detail by the probability module. By researching the technique of crossbar switch and analyzing the system performance, it has a significant meaning for building the general signal processing system.展开更多
Implementing memory using nonvolatile, low power, and nano-structure memristors has elicited widespread interest.In this paper, the SPICE model of Sr_(0.95)Ba_(0.05)TiO_(3)(SBT)-memristor was established and the corre...Implementing memory using nonvolatile, low power, and nano-structure memristors has elicited widespread interest.In this paper, the SPICE model of Sr_(0.95)Ba_(0.05)TiO_(3)(SBT)-memristor was established and the corresponding characteristic was analyzed. Based on an SBT-memristor, the process of writing, reading, and rewriting of the binary and multi-value memory circuit was analyzed. Moreover, we verified the SBT-memristor-based 4×4 crossbar binary and multi-value memory circuits through comprehensive simulations, and analyzed the sneak-path current and memory density. Finally, we apply the 8×8 crossbar multi-value memory circuits to the images memory.展开更多
Resistive switching with a self-rectifying feature is one of the most effective solutions to overcome the crosstalk issue in a crossbar array. In this paper, a memory device based on Pt/TiO_(x)/W structure with self-r...Resistive switching with a self-rectifying feature is one of the most effective solutions to overcome the crosstalk issue in a crossbar array. In this paper, a memory device based on Pt/TiO_(x)/W structure with self-rectifying property is demonstrated for write-once-read-many-times(WORM) memory application. After programming, the devices exhibit excellent uniformity and keep in the low resistance state(LRS) permanently with a rectification ratio as high as 10^(4) at ±1 V. The self-rectifying resistive switching behavior can be attributed to the Ohmic contact at TiO_(x)/W interface and the Schottky contact at Pt/TiO_(x) interface. The results in this paper demonstrate the potential application of TiO_(x)-based WORM memory device in crossbar arrays.展开更多
文摘Following publication of the original article[1],the authors noticed a mistake in the Supplementary file,more specifically in figures S11 and S12 where they used by mistake the same sub-figures.The original article[1]has been corrected.
基金Project supported by the MOST of China(Grant No.2016YFA0201801)the Beijing Advanced Innovation Center for Future Chip(ICFC)+2 种基金Beijing Municipal Science and Technology Project(Grant No.D161100001716002)the National Natural Science Foundation of China(Grant Nos.61674089,61674087,61674092,61076115,and 61774012)the Research Fund from Beijing Innovation Center for Future Chip(Grant No.KYJJ2016008)
文摘The impact of the variations of threshold voltage(V_(th))and hold voltage(V_(hold))of threshold switching(TS)selector in1 S1 R crossbar array is investigated.Based on ON/OFF state I–V curves measurements from a large number of Ag-filament TS selectors,V_(th)and V_(hold)are extracted and their variations distribution expressions are obtained,which are then employed to evaluate the impact on read process and write process in 32×321 S1 R crossbar array under different bias schemes.The results indicate that V_(th)and V_(hold)variations of TS selector can lead to degradation of 1 S1 R array performance parameters,such as minimum read/write voltage,bit error rate(BER),and power consumption.For the read process,a small V_(hold)variation not only results in the minimum read voltage increasing but it also leads to serious degradation of BER.As the standard deviation of V_(hold)and V_(th)increases,the BER and the power consumption of 1 S1 R crossbar array under 1/2 bias,1/3 bias,and floating scheme degrade,and the case under 1/2 bias tends to be more serious compared with other two schemes.For the write process,the minimum write voltage also increases with the variation of V_(hold)from small to large value.A slight increase of V_(th)standard deviation not only decreases write power efficiency markedly but also increases write power consumption.These results have reference significance to understand the voltage variation impacts and design of selector properly.
文摘The new type of embedded signal processing system based on the packet switched network is achieved. According to the application field and the-characteristics of signal processing system, the RapidIO protocol is used to solve the high-speed interconnection of multi-digital signal processor （DSP）. Based on this protocol, a kind of crossbar switch module which is used to interconnect multi-DSP in the system is introduced. A route strategy, some flow control rules and error control rules, which adapt to different RapidIO network topology are also introduced. Crossbar switch performance is analyzed in detail by the probability module. By researching the technique of crossbar switch and analyzing the system performance, it has a significant meaning for building the general signal processing system.
基金supported by the National Natural Science Foundation of China (Grant Nos. 61703246 and 61703247), the Qingdao Science and Technology Plan Project (Grant No. 19-6-2-2-cg)the Elite Project of Shandong University of Science and Technology。
文摘Implementing memory using nonvolatile, low power, and nano-structure memristors has elicited widespread interest.In this paper, the SPICE model of Sr_(0.95)Ba_(0.05)TiO_(3)(SBT)-memristor was established and the corresponding characteristic was analyzed. Based on an SBT-memristor, the process of writing, reading, and rewriting of the binary and multi-value memory circuit was analyzed. Moreover, we verified the SBT-memristor-based 4×4 crossbar binary and multi-value memory circuits through comprehensive simulations, and analyzed the sneak-path current and memory density. Finally, we apply the 8×8 crossbar multi-value memory circuits to the images memory.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61774079 and 61664001)the Science and Technology Plan of Gansu Province,China(Grant No.20JR5RA307)the Key Research and Development Program of Gansu Province,China(Grant No.18YF1GA088)。
文摘Resistive switching with a self-rectifying feature is one of the most effective solutions to overcome the crosstalk issue in a crossbar array. In this paper, a memory device based on Pt/TiO_(x)/W structure with self-rectifying property is demonstrated for write-once-read-many-times(WORM) memory application. After programming, the devices exhibit excellent uniformity and keep in the low resistance state(LRS) permanently with a rectification ratio as high as 10^(4) at ±1 V. The self-rectifying resistive switching behavior can be attributed to the Ohmic contact at TiO_(x)/W interface and the Schottky contact at Pt/TiO_(x) interface. The results in this paper demonstrate the potential application of TiO_(x)-based WORM memory device in crossbar arrays.
