针对传统的基于离散傅里叶变换(discrete Fourier transform,DFT)的信道估计算法中滤噪性能不够理想的问题,提出了一种在正交频分复用(orthogonal frequency division multiplexing,OFDM)系统中引入阈值和判决指导的DFT信道估计算法,采...针对传统的基于离散傅里叶变换(discrete Fourier transform,DFT)的信道估计算法中滤噪性能不够理想的问题,提出了一种在正交频分复用(orthogonal frequency division multiplexing,OFDM)系统中引入阈值和判决指导的DFT信道估计算法,采用阈值法对噪声进行两次降噪处理。仿真结果表明,该算法在高信噪比和低信噪比下均可提高信道估计的性能,其归一化均方误差(normalized mean square error,NMSE)指标优于传统算法。展开更多
For direct sequence spread spectrum （DSSS） receivers, the capability of rejecting narrow-band interference can be significantly improved by a process of frequency-domain interference suppression （FDIS）. The key is...For direct sequence spread spectrum （DSSS） receivers, the capability of rejecting narrow-band interference can be significantly improved by a process of frequency-domain interference suppression （FDIS）. The key issue of this process is how to determine a threshold to eliminate interference in the frequency domain, which has been extensively studied. However, these previous methods are tedious or very complex. A simple and ef- ficient algorithm based on medians is proposed. The elimination threshold is only related to the median by a scale factor, which can be obtained by the numerical analysis. Simulation results show that the algorithm provides excellent narrow-band interfer- ence suppression while only slightly degrading the signal-to-noise ratio （SNR）. A one-pass algorithm using logarithmic segmentation is further derived to estimate medians with low computational complexity. Finally, the FDIS is implemented in a field programmable gate array （FPGA） of Xilinx. Experiments are carried out by connecting the FDIS FPGA to a DSSS receiver, and the results show that the receiver has an effective countermeasure for a 60 dB interference-to-signal ratio （ISR）.展开更多
文摘针对传统的基于离散傅里叶变换(discrete Fourier transform,DFT)的信道估计算法中滤噪性能不够理想的问题,提出了一种在正交频分复用(orthogonal frequency division multiplexing,OFDM)系统中引入阈值和判决指导的DFT信道估计算法,采用阈值法对噪声进行两次降噪处理。仿真结果表明,该算法在高信噪比和低信噪比下均可提高信道估计的性能,其归一化均方误差(normalized mean square error,NMSE)指标优于传统算法。
基金supported by the National Natural Science Foundation of China(60904090)
文摘For direct sequence spread spectrum （DSSS） receivers, the capability of rejecting narrow-band interference can be significantly improved by a process of frequency-domain interference suppression （FDIS）. The key issue of this process is how to determine a threshold to eliminate interference in the frequency domain, which has been extensively studied. However, these previous methods are tedious or very complex. A simple and ef- ficient algorithm based on medians is proposed. The elimination threshold is only related to the median by a scale factor, which can be obtained by the numerical analysis. Simulation results show that the algorithm provides excellent narrow-band interfer- ence suppression while only slightly degrading the signal-to-noise ratio （SNR）. A one-pass algorithm using logarithmic segmentation is further derived to estimate medians with low computational complexity. Finally, the FDIS is implemented in a field programmable gate array （FPGA） of Xilinx. Experiments are carried out by connecting the FDIS FPGA to a DSSS receiver, and the results show that the receiver has an effective countermeasure for a 60 dB interference-to-signal ratio （ISR）.
