An enhaned NTRU cryptosystem eliminating decryption failures is proposed without using padding schemes and can resist the oracle model andchosen-ciphertext attacks. Because lattice reduction is the main threat to latt...An enhaned NTRU cryptosystem eliminating decryption failures is proposed without using padding schemes and can resist the oracle model andchosen-ciphertext attacks. Because lattice reduction is the main threat to lattice-based cryptosystems, lattice reductionalgorithms are analyzed to evaluate the security of this scheme. Furthermore, the new scheme remains the advantage of high efficiency of original NTRU.展开更多
Ubiquitous computing must incorporate a certain level of security. For the severely resource constrained applications, the energy-efficient and small size cryptography algorithm implementation is a critical problem. H...Ubiquitous computing must incorporate a certain level of security. For the severely resource constrained applications, the energy-efficient and small size cryptography algorithm implementation is a critical problem. Hardware implementations of the advanced encryption standard （AES） for authentication and encryption are presented. An energy consumption variable is derived to evaluate low-power design strategies for battery-powered devices. It proves that compact AES architectures fail to optimize the AES hardware energy, whereas reducing invalid switching activities and implementing power-optimized sub-modules are the reasonable methods. Implementations of different substitution box （S-Boxes） structures are presented with 0.25μm 1.8 V CMOS （complementary metal oxide semiconductor） standard cell library. The comparisons and trade-offs among area, security, and power are explored. The experimental results show that Galois field composite S-Boxes have smaller size and highest security but consume considerably more power, whereas decoder-switch-encoder S-Boxes have the best power characteristics with disadvantages in terms of size and security. The combination of these two type S-Boxes instead of homogeneous S-Boxes in AES circuit will lead to optimal schemes. The technique of latch-dividing data path is analyzed, and the quantitative simulation results demonstrate that this approach diminishes the glitches effectively at a very low hardware cost.展开更多
The interrupted-sampling repeater jamming(ISRJ)can cause false targets to the radio-frequency proximity sensors(RFPSs),resulting in a serious decline in the target detection capability of the RFPS.This article propose...The interrupted-sampling repeater jamming(ISRJ)can cause false targets to the radio-frequency proximity sensors(RFPSs),resulting in a serious decline in the target detection capability of the RFPS.This article proposes a recognition method for RFPSs to identify the false targets caused by ISRJ.The proposed method is realized by assigning a unique identity(ID)to each RFPS,and each ID is a periodically and chaotically encrypted in every pulse period.The processing technique of the received signal is divided into ranging and ID decryption.In the ranging part,a high-resolution range profile(HRRP)can be obtained by performing pulse compression with the binary chaotic sequences.To suppress the noise,the singular value decomposition(SVD)is applied in the preprocessing.Regarding ID decryption,targets and ISRJ can be recognized through the encryption and decryption processes,which are controlled by random keys.An adaptability analysis conducted in terms of the peak-to-side lobe ratio(PSLR)and bit error rate(BER)indicates that the proposed method performs well within a 70-k Hz Doppler shift.A simulation and experimental results show that the proposed method achieves extremely stable target and ISRJ recognition accuracies at different signal-to-noise ratios(SNRs)and jamming-to-signal ratios(JSRs).展开更多
文摘An enhaned NTRU cryptosystem eliminating decryption failures is proposed without using padding schemes and can resist the oracle model andchosen-ciphertext attacks. Because lattice reduction is the main threat to lattice-based cryptosystems, lattice reductionalgorithms are analyzed to evaluate the security of this scheme. Furthermore, the new scheme remains the advantage of high efficiency of original NTRU.
基金the "863" High Technology Research and Development Program of China (2006AA01Z226)the Scientific Research Foundation of Huazhong University of Science and Technology (2006Z011B)the Program for New Century Excellent Talents in University (NCET-07-0328).
文摘Ubiquitous computing must incorporate a certain level of security. For the severely resource constrained applications, the energy-efficient and small size cryptography algorithm implementation is a critical problem. Hardware implementations of the advanced encryption standard （AES） for authentication and encryption are presented. An energy consumption variable is derived to evaluate low-power design strategies for battery-powered devices. It proves that compact AES architectures fail to optimize the AES hardware energy, whereas reducing invalid switching activities and implementing power-optimized sub-modules are the reasonable methods. Implementations of different substitution box （S-Boxes） structures are presented with 0.25μm 1.8 V CMOS （complementary metal oxide semiconductor） standard cell library. The comparisons and trade-offs among area, security, and power are explored. The experimental results show that Galois field composite S-Boxes have smaller size and highest security but consume considerably more power, whereas decoder-switch-encoder S-Boxes have the best power characteristics with disadvantages in terms of size and security. The combination of these two type S-Boxes instead of homogeneous S-Boxes in AES circuit will lead to optimal schemes. The technique of latch-dividing data path is analyzed, and the quantitative simulation results demonstrate that this approach diminishes the glitches effectively at a very low hardware cost.
基金supported by the National Natural Science Foundation of China(Grant No.61973037)and(Grant No.61871414)Postdoctoral Fundation of China(Grant No.2022M720419)。
文摘The interrupted-sampling repeater jamming(ISRJ)can cause false targets to the radio-frequency proximity sensors(RFPSs),resulting in a serious decline in the target detection capability of the RFPS.This article proposes a recognition method for RFPSs to identify the false targets caused by ISRJ.The proposed method is realized by assigning a unique identity(ID)to each RFPS,and each ID is a periodically and chaotically encrypted in every pulse period.The processing technique of the received signal is divided into ranging and ID decryption.In the ranging part,a high-resolution range profile(HRRP)can be obtained by performing pulse compression with the binary chaotic sequences.To suppress the noise,the singular value decomposition(SVD)is applied in the preprocessing.Regarding ID decryption,targets and ISRJ can be recognized through the encryption and decryption processes,which are controlled by random keys.An adaptability analysis conducted in terms of the peak-to-side lobe ratio(PSLR)and bit error rate(BER)indicates that the proposed method performs well within a 70-k Hz Doppler shift.A simulation and experimental results show that the proposed method achieves extremely stable target and ISRJ recognition accuracies at different signal-to-noise ratios(SNRs)and jamming-to-signal ratios(JSRs).
