该文首次报道了一种极简构架的5G毫米波反向阵设计原理及其CMOS芯片实现技术。该毫米波反向阵极简构架,利用次谐波混频器提供相位共轭和阵列反向功能,无需移相电路及波束控制系统,便可实现波束自动回溯移动通信功能。该文采用国产0.18μ...该文首次报道了一种极简构架的5G毫米波反向阵设计原理及其CMOS芯片实现技术。该毫米波反向阵极简构架,利用次谐波混频器提供相位共轭和阵列反向功能,无需移相电路及波束控制系统,便可实现波束自动回溯移动通信功能。该文采用国产0.18μm CMOS工艺研制了5G毫米波反向阵芯片,包括发射前端、接收前端及跟踪锁相环等核心模块,其中发射及接收前端芯片采用次谐波混频及跨导增强等技术,分别实现了19.5 d B和18.7 d B的实测转换增益。所实现的跟踪锁相环芯片具备双模工作优势,可根据不同参考信号支持幅度调制及相位调制,实测输出信号相噪优于–125 dBc/Hz@100 kHz。该文给出的测试结果验证了所提5G毫米波反向阵通信架构及其CMOS芯片实现的可行性,从而为5G/6G毫米波通信探索了一种架构极简、成本极低、拓展性强的新方案。展开更多
An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used...An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used for design and fabrication and physical library development of thin film submicron and deep submicron CMOS/ SOI integrated circuit.展开更多
文摘该文首次报道了一种极简构架的5G毫米波反向阵设计原理及其CMOS芯片实现技术。该毫米波反向阵极简构架,利用次谐波混频器提供相位共轭和阵列反向功能,无需移相电路及波束控制系统,便可实现波束自动回溯移动通信功能。该文采用国产0.18μm CMOS工艺研制了5G毫米波反向阵芯片,包括发射前端、接收前端及跟踪锁相环等核心模块,其中发射及接收前端芯片采用次谐波混频及跨导增强等技术,分别实现了19.5 d B和18.7 d B的实测转换增益。所实现的跟踪锁相环芯片具备双模工作优势,可根据不同参考信号支持幅度调制及相位调制,实测输出信号相噪优于–125 dBc/Hz@100 kHz。该文给出的测试结果验证了所提5G毫米波反向阵通信架构及其CMOS芯片实现的可行性,从而为5G/6G毫米波通信探索了一种架构极简、成本极低、拓展性强的新方案。
文摘Submicron CMOS IC technology, including triple layer resist lithography technology, RIE, LDD, Titanium Salicide, shallow junction, thin gate oxide, no bird's beak isolation and channel's multiple implantation doping technology have been developed. 0.50μm. CMOS integrated circuits have been fabricated using this submicron CMOS process.
文摘An 'Integrated Device and Circuit simulator' for thin film (0.05-0.2μm) submicron (0.5μm) and deep submicron (0.15, 0.25,0.35μm) CMOS/ SOI integrated circuit has been developed. This simulator has been used for design and fabrication and physical library development of thin film submicron and deep submicron CMOS/ SOI integrated circuit.
