The shrinking silicon feature size causes the continuous increment of the aging effect due to the negative bias temperature instability （NBTI）, which becomes a potential stopper for IC development. As the basis of c...The shrinking silicon feature size causes the continuous increment of the aging effect due to the negative bias temperature instability （NBTI）, which becomes a potential stopper for IC development. As the basis of circuit-level aging protection, an efficient aging critical-gate identification method is crucially required to select a set of gates for protection to guarantee the normal lifetime of the circuits. The existing critical-gate identification methods always depend on a critical path set which contains so many paths that its generation procedure requires undesirable CPU runtime; furthermore, these methods can achieve a better solution with taking account of the topological connection. This paper proposes a time-efficient critical gates identification method with topological connection analysis, which chooses a small set of critical gates. Experiments over many circuits of ITC99 and ISCAS benchmark demonstrate that, to guarantee the normal lifetime （e.g., 10 years） of each circuit, our method achieves a 3.97x speedup and saves as much as 27.21% area overhead compared with the existing methods.展开更多
Technology scaling results in the propagation-induced pulse broadening and quenching（PIPBQ） effect become more noticeable.In order to effectively evaluate the soft error rate for combinational logic circuits,a soft ...Technology scaling results in the propagation-induced pulse broadening and quenching（PIPBQ） effect become more noticeable.In order to effectively evaluate the soft error rate for combinational logic circuits,a soft error rate analysis approach considering the PIPBQ effect is proposed.As different original pulse propagating through logic gate cells,pulse broadening and quenching are measured by HSPICE.After that,electrical effect look-up tables（EELUTs） for logic gate cells are created to evaluate the PIPBQ effect.Sensitized paths are accurately retrieved by the proposed re-convergence aware sensitized path search algorithm.Further,by propagating pulses on these paths to simulate fault injection,the PIPBQ effect on these paths can be quantified by EELUTs.As a result,the soft error rate of circuits can be effectively computed by the proposed technique.Simulation results verify the soft error rate improvement comparing with the PIPBQ-not-aware method.展开更多
基金supported by the National Natural Science Foundation of China under Grant No.61274036,No.61371025,No.61204027,and No.61474036
文摘The shrinking silicon feature size causes the continuous increment of the aging effect due to the negative bias temperature instability （NBTI）, which becomes a potential stopper for IC development. As the basis of circuit-level aging protection, an efficient aging critical-gate identification method is crucially required to select a set of gates for protection to guarantee the normal lifetime of the circuits. The existing critical-gate identification methods always depend on a critical path set which contains so many paths that its generation procedure requires undesirable CPU runtime; furthermore, these methods can achieve a better solution with taking account of the topological connection. This paper proposes a time-efficient critical gates identification method with topological connection analysis, which chooses a small set of critical gates. Experiments over many circuits of ITC99 and ISCAS benchmark demonstrate that, to guarantee the normal lifetime （e.g., 10 years） of each circuit, our method achieves a 3.97x speedup and saves as much as 27.21% area overhead compared with the existing methods.
基金supported by the National Natural Science Foundation of China under Grant No.61274036No.61106038+1 种基金No.61371025and No.61474036
文摘Technology scaling results in the propagation-induced pulse broadening and quenching（PIPBQ） effect become more noticeable.In order to effectively evaluate the soft error rate for combinational logic circuits,a soft error rate analysis approach considering the PIPBQ effect is proposed.As different original pulse propagating through logic gate cells,pulse broadening and quenching are measured by HSPICE.After that,electrical effect look-up tables（EELUTs） for logic gate cells are created to evaluate the PIPBQ effect.Sensitized paths are accurately retrieved by the proposed re-convergence aware sensitized path search algorithm.Further,by propagating pulses on these paths to simulate fault injection,the PIPBQ effect on these paths can be quantified by EELUTs.As a result,the soft error rate of circuits can be effectively computed by the proposed technique.Simulation results verify the soft error rate improvement comparing with the PIPBQ-not-aware method.
