The voltage controlled oscillator-based （VCO-based） continuous-time delta-sigma （CTDS） analog to digital converter （ADC） suffers from nonlinearity and mismatch in its feedback network. A new feedback network con...The voltage controlled oscillator-based （VCO-based） continuous-time delta-sigma （CTDS） analog to digital converter （ADC） suffers from nonlinearity and mismatch in its feedback network. A new feedback network consisting of a phase shifter is proposed. The phase shifter replaces the digital to analog converter （DAC） in the proposed architecture. Feasibility of the proposed idea is discussed and its higher performance is illustrated through a behavioral simulation approach （CppSim）. We have also developed the phase shifter as a variable all-pass filter in the C language. The nonlinearity and mismatch of the system caused by DAC is mitigated, resulting in higher signal to noise ratio （SNR） and signal to noise and distortion ratio （SNDR）, respectively.展开更多
A novel low power and low voltage current mirror with a very low current copy error is presented and the principle of its operation is discussed. In this circuit, the gain boosting regulated cascode scheme is used to ...A novel low power and low voltage current mirror with a very low current copy error is presented and the principle of its operation is discussed. In this circuit, the gain boosting regulated cascode scheme is used to improve the output resistance, while using inverter as an amplifier. The simulation results with HSPICE in TSMC 0.18 μm CMOS technology are given, which verify the high performance of the proposed structure. Simulation results show an input resistance of 0.014 Ω and an output resistance of 3 GΩ. The current copy error is favorable as low as 0.002% together with an input （the minimum input voltage of Vin,min- 0.24 V） and an output （the minimum output voltage of Vout,min~ 0.16 V） compliances while working with the 1 V power supply and the 50 μA input current. The current copy error is near zero at the input current of 27 μA. It consumes only 76μW and introduces a very low output offset current of 50 pA.展开更多
基金supported by Iran Telecommunication Research Center under Grant No. 4222/500
文摘The voltage controlled oscillator-based （VCO-based） continuous-time delta-sigma （CTDS） analog to digital converter （ADC） suffers from nonlinearity and mismatch in its feedback network. A new feedback network consisting of a phase shifter is proposed. The phase shifter replaces the digital to analog converter （DAC） in the proposed architecture. Feasibility of the proposed idea is discussed and its higher performance is illustrated through a behavioral simulation approach （CppSim）. We have also developed the phase shifter as a variable all-pass filter in the C language. The nonlinearity and mismatch of the system caused by DAC is mitigated, resulting in higher signal to noise ratio （SNR） and signal to noise and distortion ratio （SNDR）, respectively.
基金supported by the Iran University of Science and Technology
文摘A novel low power and low voltage current mirror with a very low current copy error is presented and the principle of its operation is discussed. In this circuit, the gain boosting regulated cascode scheme is used to improve the output resistance, while using inverter as an amplifier. The simulation results with HSPICE in TSMC 0.18 μm CMOS technology are given, which verify the high performance of the proposed structure. Simulation results show an input resistance of 0.014 Ω and an output resistance of 3 GΩ. The current copy error is favorable as low as 0.002% together with an input （the minimum input voltage of Vin,min- 0.24 V） and an output （the minimum output voltage of Vout,min~ 0.16 V） compliances while working with the 1 V power supply and the 50 μA input current. The current copy error is near zero at the input current of 27 μA. It consumes only 76μW and introduces a very low output offset current of 50 pA.
